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arXiv:2605.25552

Beyond Logical Circuits: Hardware-Aware Analysis of Expressibility and Trainability in Variational Quantum Algorithms

Muhammad Kashif, Muhammad Shafique

quant-phSubmitted May 25, 2026• Announced May 26, 2026• 0 citations
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Abstract

Variational quantum algorithms (VQAs) rely on parameterized quantum circuits (PQCs), whose performance is governed by expressibility and trainability. Existing studies typically evaluate these properties at the logical circuit level, implicitly assuming that designed PQCs remain unchanged during hardware execution. In practice, however, hardware-aware transpilation modifies circuit structure through qubit mapping, routing, and basis decomposition, potentially altering PQC behavior. In this paper, we perform a systematic hardware-aware analysis of expressibility and trainability by comparing logical and transpiled PQCs across multiple ansatz families, qubit counts, and circuit depths. Expressibility is measured using fidelity-based KL divergence, while trainability is quantified through gradient variance. Our results show that transpilation acts as an implicit architectural perturbation, producing strongly ansatz-dependent effects. Expressibility deviations exceed upto 125% in some cases, while trainability variations reach up to 25%. Structured ansatzes are generally more robust, whereas highly entangled architectures are more sensitive to transpilation-induced transformations. We further show that transpilation can alter the commonly assumed expressibility-trainability trade-off, demonstrating that logical-level analyses may not reliably predict hardware-level behavior. These findings highlight the importance of hardware-aware evaluation for accurate characterization of VQAs.

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Late Breaking Results: Hardware-Aware Compilation Reshapes Trainability in Variational Quantum Circuits

Muhammad Kashif, Muhammad Shafique

Variational quantum circuits (VQCs) are typically evaluated at the logical design level when analyzing trainability. However, execution on real quantum devices requires hardware-aware compilation (transpilation) to satisfy qubit connectivity and native gate-set constraints. In this paper, we examine how transpilation can alter the gradient statistics. Using parameter-shift differentiation and gradient variance estimation, we compare logical and transpiled circuits across three representative ansatz families: EfficientSU2 (dense entanglement), TTN (tree tensor network), and RealAmplitudes (linear entanglement). We observe architecture-dependent trainability shifts where densely entangling circuits exhibit pronounced gradient reshaping in shallow regimes, structured tensor-network circuits remain comparatively robust, and linear architectures show mixed behavior. Deep circuits across all families display minimal sensitivity to hardware-aware compilation. These findings demonstrate that transpilation acts as an implicit structural transformation of the optimization landscape, motivating compilation-aware analysis and co-design for VQCs.

quant-pharXiv:2604.16527•ACM/IEEE Design Automation Conference (DAC)•Apr 17, 2026•0 citations

Expressibility and trainability of a two-dimensional pairwise quantum-circuit ansatz

Shuai Zhang, Wei Liu, Ji-Chong Yang

Parameterized quantum circuits~(PQCs) constitute a central building block of variational quantum algorithms~(VQAs) and quantum machine learning~(QML) methods. Existing ansatz designs often adopt hardware-agnostic or simplified 1D chain/ring entanglement patterns. However, as quantum hardware continues to develop, native 2D connectivity patterns, such as planar superconducting-qubit architectures, are becoming increasingly important. Inspired by this hardware structure, we construct a native 2D pairwise ansatz and compare its expressibility and trainability with representative 1D ansatze at identical layer depths, despite their different circuit depths. For the fixed 16-qubit system, the 2D ansatz has the smallest KL divergence at $L=1$ and $2$, and its second-order frame potential approaches the theoretical lower bound more rapidly at shallow layer counts than the frame potentials of the three 1D ansatze. We also evaluate the gradient variance of the Pauli-$Z$-string expectation value $\langle Z_0\otimes\cdots\otimes Z_{15}\rangle$ with respect to the first $R_y$ angle. For this Pauli-$Z$ string and fixed parameter, the gradient variance is smaller for the 2D circuit at $L=1$--$4$. The differences narrow at $L=5$, and the four ansatze yield statistically compatible variances at $L=6$.

quant-pharXiv:2607.12996•Jul 15, 2026•0 citations

Efficiently architecting VQAs: Expressibility--Trainability--Resources Pareto-Optimality

Rodrigo M. Sanz, Andreu Angles-Castillo, Eduard Alarcon +1 more

Ansatz selection is a key factor in the performance of variational quantum algorithms (VQAs). While much of the state-of-the-art still relies on heuristic choices, an inadequate circuit structure can compromise both the expressive power and the trainability of the resulting model. Recent results have also established theoretical connections between expressibility and the onset of barren plateaus, highlighting the need for systematic criteria for ansatz selection. In this work, the ansatz is treated as a design feature to be optimized rather than a fixed block, and a design space exploration (DSE) is performed over a diverse set of parametrized quantum circuits (PQCs). Three complementary metrics -- expressibility, trainability, and resource cost -- are evaluated and used to analyze the trade-offs that emerge across different PQCs. Beyond identifying Pareto-optimal candidates, this multi-objective perspective helps clarify the interplay between these metrics and contributes quantitative evidence toward understanding the expressibility--trainability tension in variational circuits.

quant-pharXiv:2603.22142•IEEE Transactions on Quantum Engineering•Mar 24, 2026•0 citations

How to find expressible and trainable parameterized quantum circuits?

Peter Röseler, Dennis Willsch, Kristel Michielsen

Whether parameterized quantum circuits (PQCs) can be systematically constructed to be both trainable and expressive remains an open question. Highly expressive PQCs often exhibit barren plateaus, while several trainable alternatives admit efficient classical simulation. We address this question by deriving a finite-sample, dimension-independent concentration bound for estimating the variance of a PQC cost function, yielding explicit trainability guarantees. Across commonly used ansätze, we observe an anticorrelation between trainability and expressibility, consistent with theoretical insights. Building on this observation, we propose a property-based ansatz-search framework for identifying circuits that combine trainability and expressibility. We demonstrate its practical viability on a real quantum computer and apply it to variational quantum algorithms. We identify quantum neural network ansätze with improved effective dimension using over $6 \times$ fewer parameters, and for VQE on $\mathrm{H}_2$ we achieve UCCSD-like accuracy at substantially reduced circuit complexity.

quant-pharXiv:2603.14451•Mar 17, 2026•0 citations

Benchmarking PQC Ansatze in Realistic Device Topologies

Oleksa Hryniv, Vladyslav Los, Yuriy Pryyma +3 more

Parameterized quantum circuits (PQCs) serve as a flexible framework for implementing various quantum algorithms, particularly in quantum machine learning and optimization tasks. However, their training is challenging due to both theoretical constraints and the inherent limitations in current quantum hardware. A judicious choice of PQC architecture is crucial for accurately representing the solution space, and for ensuring convergence in training. Several works introduced measures of expressibility and entangling capability for PQCs, and compared these metrics across different circuit structures, providing insights into how they impact performance and efficiency. However, these investigations often assumed idealized all-to-all qubit connectivity, which is not applicable to most hardware architectures. In practice, additional transpilation steps are performed prior to execution on hardware. The potential impact of better alignment of the PQC structure with the underlying native topology has in fact motivated introduction of hardware-efficient ansatze. In our work, we extend the methodology of measuring PQC efficiency to include more realistic quantum hardware models. We examine several popular hardware topologies, including hexagonal, square, circular, linear, and all-to-all. We evaluate the expressibility and entangling capability of circuits with different connectivity types and various arrangements of rotation gates. We assess the training performance of these PQC types in the context of a variational compiling procedure and identify the preferred gate patterns. This approach provides a more realistic evaluation of PQC performance, thus offering practical insights into their applications on existing quantum devices.

IEEE International Conference on Quantum Computing and Engineering (QCE)•Sep 15, 2024•0 citations

Variational Quantum Machine Learning for Binary Classification on NISQ Hardware: Expressibility, Trainability, and Noise Robustness

Priya S. Mehta, Aleksandr V. Korolev

This study investigates classification performance and trainability of variational quantum classifiers on near-term noisy quantum hardware across circuit depth and qubit count regimes within the context of quantum computing and machine learning, an area of growing scientific importance given its implications for hybrid quantum-classical algorithm design and practical NISQ hardware benchmarking for near-term quantum advantage assessment. Using gradient-based parameter optimization of parameterized quantum circuits with hardware noise modeling via density matrix simulation and physical execution on IBM Eagle processors, we examine expressibility of parameterized circuits enabling nonlinear decision boundaries in feature Hilbert space, with trainability constrained by barren plateau gradients at large qubit counts in 96 circuit architectures (4 qubit counts x 4 depths x 6 ansatz families) evaluated across 5 classification datasets with 20 random initialization seeds each drawn from IBM Quantum Eagle (127-qubit) and Falcon (27-qubit) processors with noise mitigation via zero-noise extrapolation. Results indicate that 10-qubit, 4-layer VQC achieves 84.2% classification accuracy on the best benchmark, within 3.8 percentage points of classical SVM, but gradient variance decays exponentially with qubit count (variance halving per 2 added qubits), confirming barren plateau scaling (p < 0.001), with 84.2% accuracy, 3.8 pp gap to classical SVM baseline as the primary quantitative benchmark. Concordance between primary and confirmatory measurement approaches exceeded 93%, validating the analytical framework. These findings contribute empirically to quantum computing and machine learning and carry actionable implications for the design of programs and policies targeting hybrid quantum-classical algorithm design and practical NISQ hardware benchmarking for near-term quantum advantage assessment.

Princeton Journal of Pre-Collegiate Research•Jan 1, 2021•0 citations
Variational quantum algorithms (VQAs) rely on parameterized quantum circuits (PQCs), whose performance is governed by expressibility and trainability. Existing studies typically evaluate these properties at the logical circuit level, implicitly assuming that designed PQCs remain unchanged during hardware execution. In practice, however, hardware-aware transpilation modifies circuit structure through qubit mapping, routing, and basis decomposition, potentially altering PQC behavior. In this paper, we perform a systematic hardware-aware analysis of expressibility and trainability by comparing logical and transpiled PQCs across multiple ansatz families, qubit counts, and circuit depths. Expressibility is measured using fidelity-based KL divergence, while trainability is quantified through gradient variance. Our results show that transpilation acts as an implicit architectural perturbation, producing strongly ansatz-dependent effects. Expressibility deviations exceed upto 125% in some cases, while trainability variations reach up to 25%. Structured ansatzes are generally more robust, whereas highly entangled architectures are more sensitive to transpilation-induced transformations. We further show that transpilation can alter the commonly assumed expressibility-trainability trade-off, demonstrating that logical-level analyses may not reliably predict hardware-level behavior. These findings highlight the importance of hardware-aware evaluation for accurate characterization of VQAs.
Variational quantum circuits (VQCs) are typically evaluated at the logical design level when analyzing trainability. However, execution on real quantum devices requires hardware-aware compilation (transpilation) to satisfy qubit connectivity and native gate-set constraints. In this paper, we examine how transpilation can alter the gradient statistics. Using parameter-shift differentiation and gradient variance estimation, we compare logical and transpiled circuits across three representative ansatz families: EfficientSU2 (dense entanglement), TTN (tree tensor network), and RealAmplitudes (linear entanglement). We observe architecture-dependent trainability shifts where densely entangling circuits exhibit pronounced gradient reshaping in shallow regimes, structured tensor-network circuits remain comparatively robust, and linear architectures show mixed behavior. Deep circuits across all families display minimal sensitivity to hardware-aware compilation. These findings demonstrate that transpilation acts as an implicit structural transformation of the optimization landscape, motivating compilation-aware analysis and co-design for VQCs.
Parameterized quantum circuits~(PQCs) constitute a central building block of variational quantum algorithms~(VQAs) and quantum machine learning~(QML) methods. Existing ansatz designs often adopt hardware-agnostic or simplified 1D chain/ring entanglement patterns. However, as quantum hardware continues to develop, native 2D connectivity patterns, such as planar superconducting-qubit architectures, are becoming increasingly important. Inspired by this hardware structure, we construct a native 2D pairwise ansatz and compare its expressibility and trainability with representative 1D ansatze at identical layer depths, despite their different circuit depths. For the fixed 16-qubit system, the 2D ansatz has the smallest KL divergence at L=1L=1L=1 and 222, and its second-order frame potential approaches the theoretical lower bound more rapidly at shallow layer counts than the frame potentials of the three 1D ansatze. We also evaluate the gradient variance of the Pauli-ZZZ-string expectation value ⟨Z0⊗⋯⊗Z15⟩\langle Z_0\otimes\cdots\otimes Z_{15}\rangle⟨Z0​⊗⋯⊗Z15​⟩ with respect to the first RyR_yRy​ angle. For this Pauli-ZZZ string and fixed parameter, the gradient variance is smaller for the 2D circuit at L=1L=1L=1--444. The differences narrow at L=5L=5L=5, and the four ansatze yield statistically compatible variances at L=6L=6L=6.
Ansatz selection is a key factor in the performance of variational quantum algorithms (VQAs). While much of the state-of-the-art still relies on heuristic choices, an inadequate circuit structure can compromise both the expressive power and the trainability of the resulting model. Recent results have also established theoretical connections between expressibility and the onset of barren plateaus, highlighting the need for systematic criteria for ansatz selection. In this work, the ansatz is treated as a design feature to be optimized rather than a fixed block, and a design space exploration (DSE) is performed over a diverse set of parametrized quantum circuits (PQCs). Three complementary metrics -- expressibility, trainability, and resource cost -- are evaluated and used to analyze the trade-offs that emerge across different PQCs. Beyond identifying Pareto-optimal candidates, this multi-objective perspective helps clarify the interplay between these metrics and contributes quantitative evidence toward understanding the expressibility--trainability tension in variational circuits.
Whether parameterized quantum circuits (PQCs) can be systematically constructed to be both trainable and expressive remains an open question. Highly expressive PQCs often exhibit barren plateaus, while several trainable alternatives admit efficient classical simulation. We address this question by deriving a finite-sample, dimension-independent concentration bound for estimating the variance of a PQC cost function, yielding explicit trainability guarantees. Across commonly used ansätze, we observe an anticorrelation between trainability and expressibility, consistent with theoretical insights. Building on this observation, we propose a property-based ansatz-search framework for identifying circuits that combine trainability and expressibility. We demonstrate its practical viability on a real quantum computer and apply it to variational quantum algorithms. We identify quantum neural network ansätze with improved effective dimension using over 6×6 \times6× fewer parameters, and for VQE on H2\mathrm{H}_2H2​ we achieve UCCSD-like accuracy at substantially reduced circuit complexity.
Parameterized quantum circuits (PQCs) serve as a flexible framework for implementing various quantum algorithms, particularly in quantum machine learning and optimization tasks. However, their training is challenging due to both theoretical constraints and the inherent limitations in current quantum hardware. A judicious choice of PQC architecture is crucial for accurately representing the solution space, and for ensuring convergence in training. Several works introduced measures of expressibility and entangling capability for PQCs, and compared these metrics across different circuit structures, providing insights into how they impact performance and efficiency. However, these investigations often assumed idealized all-to-all qubit connectivity, which is not applicable to most hardware architectures. In practice, additional transpilation steps are performed prior to execution on hardware. The potential impact of better alignment of the PQC structure with the underlying native topology has in fact motivated introduction of hardware-efficient ansatze. In our work, we extend the methodology of measuring PQC efficiency to include more realistic quantum hardware models. We examine several popular hardware topologies, including hexagonal, square, circular, linear, and all-to-all. We evaluate the expressibility and entangling capability of circuits with different connectivity types and various arrangements of rotation gates. We assess the training performance of these PQC types in the context of a variational compiling procedure and identify the preferred gate patterns. This approach provides a more realistic evaluation of PQC performance, thus offering practical insights into their applications on existing quantum devices.
This study investigates classification performance and trainability of variational quantum classifiers on near-term noisy quantum hardware across circuit depth and qubit count regimes within the context of quantum computing and machine learning, an area of growing scientific importance given its implications for hybrid quantum-classical algorithm design and practical NISQ hardware benchmarking for near-term quantum advantage assessment. Using gradient-based parameter optimization of parameterized quantum circuits with hardware noise modeling via density matrix simulation and physical execution on IBM Eagle processors, we examine expressibility of parameterized circuits enabling nonlinear decision boundaries in feature Hilbert space, with trainability constrained by barren plateau gradients at large qubit counts in 96 circuit architectures (4 qubit counts x 4 depths x 6 ansatz families) evaluated across 5 classification datasets with 20 random initialization seeds each drawn from IBM Quantum Eagle (127-qubit) and Falcon (27-qubit) processors with noise mitigation via zero-noise extrapolation. Results indicate that 10-qubit, 4-layer VQC achieves 84.2% classification accuracy on the best benchmark, within 3.8 percentage points of classical SVM, but gradient variance decays exponentially with qubit count (variance halving per 2 added qubits), confirming barren plateau scaling (p < 0.001), with 84.2% accuracy, 3.8 pp gap to classical SVM baseline as the primary quantitative benchmark. Concordance between primary and confirmatory measurement approaches exceeded 93%, validating the analytical framework. These findings contribute empirically to quantum computing and machine learning and carry actionable implications for the design of programs and policies targeting hybrid quantum-classical algorithm design and practical NISQ hardware benchmarking for near-term quantum advantage assessment.