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arXiv:2604.25524

Defect-Adaptive Lattice Surgery on Irregular Boundary Surface-Code Patches

GunSik Min, Youshin Chung, Yujin Kang, Jun Heo

quant-phSubmitted Apr 28, 2026• Announced Apr 29, 2026• 0 citations• Revised Sep 11, 2026 (v2)
v1 · Apr 28, 2026v2 · Sep 11, 2026
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Abstract

Defect-adaptive surface-code methods construct valid logical patches on imperfect hardware, but fault-tolerant computation also requires certifying that requested logical operations remain executable on the resulting irregular geometries. We address this problem for lattice-surgery merges whose interfaces intersect deformed boundaries, unavailable checks, or gauge-inferred operators. Our compiler constructs an admissible seam-measurement set whose elements associate effective seam supports with raw-outcome selectors and schedule metadata. A GF(2) row-space test then determines whether the requested joint parity is realizable modulo pre-merge stabilizer constraints, returning either an explicit parity-extraction rule or a dual witness of non-realizability within the evaluated set. Paired ablations isolate the contribution of the proposed measurement-set construction rules. We further apply the test to configurations generated by Snakes and Ladders (SnL) on 15,000 clustered boundary-defect maps. Adding the proposed boundary-reconstruction rows increases the certification rate from 61.88\% to 62.79\%, with the gain concentrated in strongly clustered regimes. The framework therefore provides a compiler step that separates defect-adaptive patch construction from the certification and extraction of lattice-surgery parity measurements.

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Defect-adaptive surface-code methods construct valid logical patches on imperfect hardware, but fault-tolerant computation also requires certifying that requested logical operations remain executable on the resulting irregular geometries. We address this problem for lattice-surgery merges whose interfaces intersect deformed boundaries, unavailable checks, or gauge-inferred operators. Our compiler constructs an admissible seam-measurement set whose elements associate effective seam supports with raw-outcome selectors and schedule metadata. A GF(2) row-space test then determines whether the requested joint parity is realizable modulo pre-merge stabilizer constraints, returning either an explicit parity-extraction rule or a dual witness of non-realizability within the evaluated set. Paired ablations isolate the contribution of the proposed measurement-set construction rules. We further apply the test to configurations generated by Snakes and Ladders (SnL) on 15,000 clustered boundary-defect maps. Adding the proposed boundary-reconstruction rows increases the certification rate from 61.88% to 62.79%, with the gain concentrated in strongly clustered regimes. The framework therefore provides a compiler step that separates defect-adaptive patch construction from the certification and extraction of lattice-surgery parity measurements.
Modular quantum computing is a leading candidate for scalable fault tolerant quantum computation. Performing lattice surgery using surface code patches in different modules requires the use of inter-module gates that are noisier than the local gates. Furthermore, the merged layouts during lattice surgery expose multiple directions in which hook errors can propagate to reduce the fault distance. Existing hook-avoiding schedules either increase the syndrome extraction circuit depth, or let link faults propagate into the bulk. We introduce a seam construction that allows splitting arbitrary merged rotated surface code layout into smaller patches with uniform boundaries that could keep their own hook-avoiding N/Z shaped schedule. At the seam we split weight-4 stabilizers into pairs of weight-2 stabilizers that are mediated through a Bell pair and measured within a CNOT depth of 4. We also employ the use of three-qubit CXX\texttt{CXX}CXX gates for parity measurements at the seam to maintain the minimum CNOT depth. Through this seam construction, we confine the elevated link error at the seam, protecting the bulk from higher error rate. We also give a custom detector annotator for such seams that can find the detector space, annotate detectors in the Stim circuits, and ensure that they are suitable to use by matching decoders. We implement our construction for the logical Pauli-XXXXXX measurement lattice surgery and a cross-shaped spatial junction and sweep the link error rate from 101010 times to 100100100 times a fixed bulk error rate, and show that our construction gives the lowest and most stable logical error rate than the other frameworks compared here.
We develop smooth hybrid lattice surgery for group surface codes, enabling joint logical measurements through merge and split operations along smooth boundaries. The code patches may correspond to identical or different finite groups, including non-Abelian groups. Our central result is that smooth merge and split realize a logical KKK-coset measurement, where KKK is the subgroup defining the interface. This generalizes the joint logical parity measurement of ordinary surface codes. Using a tensor-network representation, we derive explicit measurement circuits and develop procedures for correcting nonidentity measurement outcomes. We illustrate the framework through a generalized controlled multiplication gate between group surface codes and protocols for preparing the TTT, CZCZCZ, CCXCCXCCX, and CSCSCS magic states, producing resources encoded in one or more Z2\mathbb{Z}_2Z2​ surface code patches. Our results show how smooth hybrid lattice surgery broadens the range of logical operations available for group surface codes.
Fault-tolerant quantum computation requires logical operations that manipulate encoded information while preserving quantum error-correction protection. In planar surface-code architectures, code deformation and lattice surgery provide a local, measurement-based route to such operations. Here we experimentally realize key elements of patch-based surface-code logical processing on a 107-qubit superconducting quantum processor. We first implement a reusable primitive layer comprising merge and split, patch expansion and shrinkage, and deformations mediated by domain walls and twist defects. We then compose these primitives to realize logical state routing, the logical controlled-NOT gate, and the single-qubit Hadamard and phase gates, which together form a Clifford-generating set. All operations are implemented on distance-three rotated surface-code patches with multi-round syndrome extraction and neural-network decoding, without post-selection. Our results advance superconducting surface-code experiments from protected logical memory to active, patch-based fault-tolerant logical operations.
We introduce patchwork, a lattice-surgery compiler for arbitrary multi-qubit Pauli measurements on a prescribed narrow-corridor two-dimensional surface-code layout. Systematic geometric rules simplify stabilizer placement and gate scheduling, including for logical YYY measurements implemented using twist defects. We introduce measurement circuits and schedules that, together with protruding lobes of YYY-extension patches, preserve the full effective code distance for all numerically tested code distances. To support parallel decoding, we develop a wavefront algorithm that partitions merged lattice-surgery patches into space-time commit, buffer, and cleanup regions. Simulations of three sequential multi-qubit Pauli measurements acting on ten logical qubits show that staged decoding achieves total failure probabilities close to those of monolithic decoding over the parameters tested. These methods provide an automated framework for fault-tolerant lattice surgery and a route toward scalable, real-time decoding.
One of the critical challenges solid-state quantum processors face is the presence of fabrication imperfections and two-level systems, which render certain qubits and gates either inoperable or much noisier than tolerable by quantum error-correction protocols. To address this challenge, we develop a suite of novel and highly performant methods for adapting surface code patches in the presence of defective qubits and gates, which we call . We explain how our algorithm generates and compares several strategies in order to find the optimal one for any given configuration of defective components, as well as introduce heuristics to improve runtime and minimize computing resources required by our algorithm. In addition to memory storage we also show how to apply our methods to lattice surgery protocols. Compared to prior works, our methods significantly improve the code distance of the adapted surface code patches for realistic defect rates, resulting in a logical performance similar to that of the defect-free patches.
Lattice surgery compilation plays a central role in translating fault-tolerant quantum programs into efficient surface code realizations, where both spatial and temporal resources directly determine the cost of execution. Recent work has demonstrated the benefits of using ZX-diagrams as an intermediate representation for lattice surgery compilation, enabling semantics-preserving transformations that reduce spacetime cost. However, existing compilation restricts ZX reduction to preserve diagram structures that can be directly embedded as lattice surgery junctions. We present SpiderLS, which extends prior approach by leveraging full ZX reduction. To translate the resulting diagram into executable lattice surgery operations, SpiderLS applies a sequence of compiler passes that derives an execution order, generates target code by grouping compatible interactions into multi-target operations, and lowers the target code to Pauli-product measurements. The resulting explicit patch and Pauli-boundary requirements guide logical scheduling and structure-aware spacetime routing. Across representative algorithmic and random workloads, SpiderLS achieves average reductions of 49.2% in spacetime volume and 99.8% in compilation time compared with the prior ZX-based compiler.