Scaling superconducting quantum processors is increasingly constrained by the wiring, heat load, and calibration overhead associated with delivering high-resolution analog signals from room temperature to qubits at millikelvin temperature. Here we demonstrate a superconducting digital-to-analog converter (DAC) integrated with high-coherence fluxonium qubits in a multi-chip module architecture. The DACs generate persistent analog flux signals for tuning qubit parameters and are programmed deterministically using single-flux-quantum (SFQ) pulses, providing a digital interface compatible with established SFQ routing and demultiplexing technologies. Operating at millikelvin temperature, the DACs enable in-situ tuning of fluxonium qubits without measurable degradation of qubit coherence. The presented device provides a static control primitive for flux-tunable qubits, enabling parameter homogenization and eliminating the need for individual room-temperature DC bias lines. These results establish SFQ-programmable millikelvin DACs as a building block for digitally controlled superconducting quantum processors.
Scaling superconducting quantum processors is increasingly constrained by the wiring, heat load, and calibration overhead associated with delivering high-resolution analog signals from room temperature to qubits at millikelvin temperature. Here we demonstrate a superconducting digital-to-analog converter (DAC) integrated with high-coherence fluxonium qubits in a multi-chip module architecture. The DACs generate persistent analog flux signals for tuning qubit parameters and are programmed deterministically using single-flux-quantum (SFQ) pulses, providing a digital interface compatible with established SFQ routing and demultiplexing technologies. Operating at millikelvin temperature, the DACs enable in-situ tuning of fluxonium qubits without measurable degradation of qubit coherence. The presented device provides a static control primitive for flux-tunable qubits, enabling parameter homogenization and eliminating the need for individual room-temperature DC bias lines. These results establish SFQ-programmable millikelvin DACs as a building block for digitally controlled superconducting quantum processors.
As quantum computing processors increase in size, there is growing interest in developing cryogenic electronics to overcome significant challenges to system scaling. Single flux-quantum (SFQ) circuits offer a promising alternative to remote, bulky, and power-hungry room temperature electronics. To meet the need for digital qubit control, readout, and co-processing, SFQ circuits must be adapted to operate at millikelvin temperatures near quantum processors. SEEQC's SFQuClass digital quantum management approach proximally places energy-efficient SFQ (ERSFQ) circuits and qubits in a multi-chip module. This enables extremely low power dissipation, compatible with a typical dilution cryostat's limited cooling power, while maintaining high processing speed and low error rates. We report on systematic testing from 4 K to 10 mK of a comprehensive set of ERSFQ cells, as well as more complex circuits such as programmable counters and demultiplexers used in digital qubit control. We compare the operating margins and error rates of these circuits and find that, at millikelvin, bias margins decrease and the center of the margins (i.e., the optimal bias current value) increases by ~15%, compared to 4.2 K. The margins can be restored by thermal annealing by reducing Josephson junction (JJ) critical current Ic. To provide guidance for how circuit parameters vary from 4.2 K to millikelvin, relevant analog process control monitors (PCMs) were tested in the temperature range of interest. The measured JJ critical current (of the PCM JJ arrays) increases by ~15% when decreasing temperature from 4.2 K to millikelvin, in good agreement with both theory and the empirically measured change in the center of bias margins for the tested digital circuits.
In the quest to build a fault-tolerant quantum computer, superconducting circuits based on Josephson junctions have emerged as a leading architecture. Coherence times have increased significantly over the last two decades, and processors with ∼ 50 qubits have been experimentally demonstrated. These systems traditionally utilize microwave frequency control signals, and heterodyne based detection schemes for measurement. Both of these techniques rely heavily on room temperature microwave generators, high-bandwidth lines from room temperature to millikelvin temperatures, and bulky non-reciprocal elements such as cryogenic microwave isolators. Reliance on these elements makes it impractical to scale existing devices up a single order of magnitude, let alone the 5-6 orders of magnitude needed for performing fault-tolerant quantum algorithms. Here, I present results that suggesting superconducting digital logic, namely Single Flux Quantum (SFQ) logic, can replace analog control and measurement techniques, avoiding the significant overhead involved. I describe a scheme for measuring qubits with a device known as a Josephson Photomultiplier (JPM), which crucially stores the result of a qubit measurement in a classical circulating supercurrent within the device and allows for integration with SFQ detection circuitry. This technique is experimentally demonstrated, with single-shot measurement fidelity of 92%. Two methods for accessing this measurement result are presented, one utilizing ballistic fluxons, and another utilizing flux comparison. Initial experimental results of the latter are presented. In addition, I describe a scheme for controlling qubits with sequences of digital SFQ pulses. This method is then used to control a qubit without a microwave signal generator, with results of an average single-qubit gate fidelity of around 95%. When combined, these techniques form a nearly fully digital interface to superconducting qubits, which could allow these systems to scale much more easily.
Current superconducting quantum computers (QC) rely on a brute-force scaling approach where quantum chips operating at the millikelvin stage inside dilution refrigerators are connected to room-temperature electronics via an ever-increasing number of signal wires. In order to drastically scale up such systems without facing refrigeration challenges, these quantum interface electronics need to be integrated at cryogenic temperatures, ideally at the same stage as qubits. In this paper, we show that, by employing energy-efficient digital superconducting microchips based on single flux quantum (SFQ) technology, all essential functions to operate a full stack quantum computer can be integrated at 10 mK. They include digital qubit charge control and magnetic flux control for single- and two-qubit gates, as well as digital qubit readout.
This paper presents the design and test results of a CMOS current-based Digital to Analog Converter (DAC) that operates at cryogenic temperatures and that can be used to precisely control the amount of flux coupled to qubits or that can be used in the readout of superconducting circuits. The current pulse output can be controlled in terms of its amplitude, rise and fall slopes, via digital controls, and pulse width, via external triggers, while driving a superconducting circuit. The design has been implemented in a planar 90 nm CMOS process and test results closely match circuit predictions. The solution's wide degree of digital tunability affords potential application of the same device to many types of quantum circuits, beyond those discussed here. Due to the wide-ranging flexibility of digital CMOS control, we envision that this DAC design will enable the next generation of high-fidelity cryo-CMOS control architectures for superconducting qubits.
We introduce a superconducting digital-to-analog converter (DAC) that filters control noise, provides native multiplexing, performs quantum gates in nanoseconds, and can be controlled by CMOS. This is achieved by transducing a trapezoidal drive pulse into a superconducting soliton, which is then held in the DAC load loop, applying flux to a mutually-coupled superconducting qubit or gate coupler. The analog flux output by the DAC can be easily controlled by varying the soliton hold time, or with a DC-biased tunable DAC-qubit coupler, allowing the DAC to perform a fixed-time, high-fidelity gate that's robust to fabrication variance or flux offsets in the quantum circuit. Our initial demonstration shows that the DAC can successfully perform 5.6 ns S-gates on transmons. We measure the DAC-induced quantum state excitation probability per gate to be 0.05%, and find that the DAC-induced relaxation rate from the qubit 1 state is below the intrinsic T1 rate limit of the transmon. Quantum simulations show qualitative agreement with the measured data, and predict that the DAC excitation rate can be lowered 10 times further by overdamping the Josephson junction (JJ) in the DAC load loop. may be limited by a Interleaved Randomized Benchmarking (IRB) sequences on an observer qubit reveal that, when scaling to many qubits, the DAC's performance may be limited by a non-local, DAC-induced phase error of 1.6% per gate, appearing in ancilla qubits that are not directly coupled to any of the 30 DACs on the chip. We discuss strategies for future layouts of multi-DAC chips that focus on mitigating the source of these non-local, high-frequency electromagnetic interactions (EMI), and how to incorporate a DC-tunable coupler for phase correction.
We present a single-flux-quantum (SFQ)-based digital-to-analog converter (DAC) generating bipolar output voltages, in which the key component is a polarity-switchable double-flux-quantum amplifier (PS-DFQA). The DAC comprised a dc/SFQ converter, an 8-bit variable pulse-number multiplier (PNM), and a ±8-fold PS-DFQA integrated on a single chip. SFQ pulse-frequency modulation was employed to realize variable output voltage amplitude, for which the multiplication factor of the variable-PNM was controlled by a commercial data generator situated at room temperature. The variable-PNM realized 8-bit resolution with a multiplication factor between 0 and 255. Bias currents fed to the ±8-fold PS-DFQA were polarity switched in synchronization with the digital code for the variable-PNM. The whole circuits including I/O elements were designed using SFQ cell libraries, and fabricated using a niobium integration process. Sinusoidal bipolar voltage waveform of 0.38 mVpp was demonstrated using a reference signal source of 43.94 MHz.