Current superconducting quantum computers (QC) rely on a brute-force scaling approach where quantum chips operating at the millikelvin stage inside dilution refrigerators are connected to room-temperature electronics via an ever-increasing number of signal wires. In order to drastically scale up such systems without facing refrigeration challenges, these quantum interface electronics need to be integrated at cryogenic temperatures, ideally at the same stage as qubits. In this paper, we show that, by employing energy-efficient digital superconducting microchips based on single flux quantum (SFQ) technology, all essential functions to operate a full stack quantum computer can be integrated at 10 mK. They include digital qubit charge control and magnetic flux control for single- and two-qubit gates, as well as digital qubit readout.
Current superconducting quantum computers (QC) rely on a brute-force scaling approach where quantum chips operating at the millikelvin stage inside dilution refrigerators are connected to room-temperature electronics via an ever-increasing number of signal wires. In order to drastically scale up such systems without facing refrigeration challenges, these quantum interface electronics need to be integrated at cryogenic temperatures, ideally at the same stage as qubits. In this paper, we show that, by employing energy-efficient digital superconducting microchips based on single flux quantum (SFQ) technology, all essential functions to operate a full stack quantum computer can be integrated at 10 mK. They include digital qubit charge control and magnetic flux control for single- and two-qubit gates, as well as digital qubit readout.
As quantum computing processors increase in size, there is growing interest in developing cryogenic electronics to overcome significant challenges to system scaling. Single flux-quantum (SFQ) circuits offer a promising alternative to remote, bulky, and power-hungry room temperature electronics. To meet the need for digital qubit control, readout, and co-processing, SFQ circuits must be adapted to operate at millikelvin temperatures near quantum processors. SEEQC's SFQuClass digital quantum management approach proximally places energy-efficient SFQ (ERSFQ) circuits and qubits in a multi-chip module. This enables extremely low power dissipation, compatible with a typical dilution cryostat's limited cooling power, while maintaining high processing speed and low error rates. We report on systematic testing from 4 K to 10 mK of a comprehensive set of ERSFQ cells, as well as more complex circuits such as programmable counters and demultiplexers used in digital qubit control. We compare the operating margins and error rates of these circuits and find that, at millikelvin, bias margins decrease and the center of the margins (i.e., the optimal bias current value) increases by ~15%, compared to 4.2 K. The margins can be restored by thermal annealing by reducing Josephson junction (JJ) critical current Ic. To provide guidance for how circuit parameters vary from 4.2 K to millikelvin, relevant analog process control monitors (PCMs) were tested in the temperature range of interest. The measured JJ critical current (of the PCM JJ arrays) increases by ~15% when decreasing temperature from 4.2 K to millikelvin, in good agreement with both theory and the empirically measured change in the center of bias margins for the tested digital circuits.
Scaling superconducting quantum processors is increasingly constrained by the wiring, heat load, and calibration overhead associated with delivering high-resolution analog signals from room temperature to qubits at millikelvin temperature. Here we demonstrate a superconducting digital-to-analog converter (DAC) integrated with high-coherence fluxonium qubits in a multi-chip module architecture. The DACs generate persistent analog flux signals for tuning qubit parameters and are programmed deterministically using single-flux-quantum (SFQ) pulses, providing a digital interface compatible with established SFQ routing and demultiplexing technologies. Operating at millikelvin temperature, the DACs enable in-situ tuning of fluxonium qubits without measurable degradation of qubit coherence. The presented device provides a static control primitive for flux-tunable qubits, enabling parameter homogenization and eliminating the need for individual room-temperature DC bias lines. These results establish SFQ-programmable millikelvin DACs as a building block for digitally controlled superconducting quantum processors.
Scaling superconducting quantum computers to the fault-tolerant regime calls for a commensurate scaling of the classical control and readout stack. Today's systems largely rely on room-temperature, rack-based instrumentation connected to dilution-refrigerator cryostats through many coaxial cables. Looking ahead, superconducting fault-tolerant quantum computers (FTQCs) will likely adopt a heterogeneous quantum-classical architecture that places selected electronics at cryogenic stages -- for example, cryo-CMOS at 4~K and superconducting digital logic at 4~K and/or mK stages -- to curb wiring and thermal-load overheads. This review distills key requirements, surveys representative room-temperature and cryogenic approaches, and provides a transparent first-order accounting framework for cryoelectronics. Using an RSA-2048-scale benchmark as a concrete reference point, we illustrate how scaling targets motivate constraints on multiplexing and stage-wise cryogenic power, and discuss implications for functional partitioning across room-temperature electronics, cryo-CMOS, and superconducting logic.
An approach for scalable quantum computing infrastructure based on the use of low-power digital superconducting single flux quantum (SFQ) circuits is described. Rather than replicating the room-temperature microwave control and measurement infrastructure solutions dominating the current systems, we use the inherent to superconducting technology methods - the use of SFQ pulses directly at the base temperature. For qubit control, we irradiate qubits with the coherent SFQ pulse sequences computed using optical control theory. For qubit measurement, Josephson photon counter performs projective quantum measurement, the result of which is converted to digital SFQ output. These operations are aided by a high-speed digital SFQ coprocessor located at higher temperature stage (e.g., 3 K) to process the measurement results and load new control sequences to 20 mK SFQ quantum-classical interface circuits.
Abstract Controlling a large number of superconducting qubits is a key challenge for realizing a fault-tolerant quantum computer. Implementing a qubit control system operating at the proximal millikelvin stage of the dilution refrigerator is a promising approach to reduce the number of coaxial cables required for qubit control. Single-flux-quantum (SFQ) logic circuits are one candidate for realizing such cryogenic control systems; however, their power dissipation must be minimized to avoid any negative impact on qubit performance. In this study, we demonstrate the operation of a flux-bias-free (FBF) flux qubit controlled by an SFQ driver on a monolithic chip. Here, the critical current ( I C ) of the Josephson junctions in the SFQ driver was set to a few µA, which is two orders of magnitude smaller than that in a typical SFQ circuit operating at 4 K, significantly reducing power consumption. Using this low-power SFQ driver, we successfully demonstrate single-qubit operation without any reduction of the energy relaxation time of the FBF qubit.
Quantum computing promises an exponential speed-up of computation compared to what is nowadays achievable with classical computers. In this way, it enables the evaluation of more complex models and the breaching of current security algorithms. For the operation of a quantum system, many questions remain to be answered. Currently, there are several quantum technologies that promise to be both reliable and scalable, two features required for large scale quantum operations. Common to all technologies is the operating temperature that needs to be close to absolute zero, i.e. below 100 mK, to suppress environment noise and allow the quantum properties to become 'visible'. In order for any quantum processor to be operated, a so-called quantum-classical interface is required for the quantum bit (qubit) read-out and control. This interface consists of various electronic blocks, such as analog-to-digital converters, digital-to-analog converters, mixers, amplifiers and a digital controller. Especially the analog blocks require effort to meet the noise and stability constraints as not to disturb the very sensitive qubits and allow reading of the tiny signals. As the qubits live in extremely deep-cryogenic temperatures, long wires interface the cryogenic with the room temperature environment, where most of the electronics is situated. However, for a scalable system, heat injection becomes a serious problem, with many wires between 300 K and sub-Kelvin. Furthermore, such amount of interconnects is challenging to mechanically place in a dilution refrigerator. Therefore, in this work, we propose to implement the electronics not at room temperature, but at a temperature much closer to the qubits, for example at 4 K. This not only reduces significantly the wiring between room temperature and the qubits, but we can also benefit from lower electronic noise at such a temperature. The operation of conventional electronics almost 200°C below its normal temperature range is not trivial as device properties alter significantly and most circuits no longer operate as intended. In CMOS processes, the main technology in the integrated electronics world, the behaviour of the transistors, required for the implementation of any circuit, deviates considerably at low temperatures. The transistor's threshold voltage goes up, the mobility increases and the subthreshold slope becomes steeper, to name just a few of these deviations. Although there are improvements in performance, there are also some counter effects, and characterization of the transistors is needed to observe the changes. Once devices are characterized at such low temperatures, new models can be built and circuits can be simulated and adapted to operate properly at cryogenic temperatures. Luckily, there are various commercially available devices that can already withstand the chills of cold. We demonstrated various commercially available devices, such as a field-programmable gate array (FPGA) implemented in a 28 nm CMOS process, to be operating without major concerns at 4~K. Its properties alter only slightly, within 5 to 10%, and all tested circuit implementations, working at 300~K, also worked at 4 K. We combined both commercially available devices, that operate 200 K below their specified temperature range, with custom designed CMOS circuits to implement a cryogenic read-out platform for spin qubits. This system comprises amplifiers, an ADC, an FPGA, voltage regulators and a clock generator. It allows to amplify the tiny signal from the qubits and digitize it directly in the FPGA in order to process the data locally at 4~K. This system is one of the first systematic attempts at operating a part of the quantum-classical interface at cryogenic temperatures and forms the basis for future systems comprising the complete electronic interface for qubits to operate at such low temperatures. One of the main problems to tackle for cryogenic electronic systems is their power consumption. Power budgets are simply limited to roughly 1 or 2 Watts at 4 K and exponentially lower at deeper cryogenic temperatures, thus limiting the size of large-scale electronic systems. Our approach of combined commercial and custom circuits will have to be steadily replaced by a single (custom) technology that meets both power and scalability constraints. One of the best candidates is CMOS, a technology that the industry has relied upon for several decades and benefits from many optimizations thanks to Moore's law.