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arXiv:2602.20002 · Materials for Quantum Technology

Electrical post-fabrication tuning of aluminum Josephson junctions at room temperature

Christian Križan, Maurizio Toselli, Irshad Ahmad, Hadi Khaksaran, Marcus Rommel, Nermin Trnjanin, Janka Biznárová, Mamta Dahiya, Emil Hogedal, Halldór Jakobsson, Andreas Nylander, Jonas Bylander, Per Delsing, Giovanna Tancredi

quant-phSubmitted Feb 23, 2026• Announced Feb 24, 2026• 0 citations
v1 · Feb 23, 2026v2 · Jun 22, 2026
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Abstract

Josephson junctions are a key element of superconducting quantum technology, serving as the core building blocks of superconducting qubits. We present an experimental study on room-temperature electrical tuning of aluminum junctions, showing that voltage pulses can controllably increase their resistance and adjust the Josephson energy while maintaining qubit quality factors above 1 million. We find that the rate of resistance increase scales exponentially with pulse amplitude during manipulation, after which the spontaneous resistance increase scales proportionally to the amount of manipulation. We show that this spontaneous increase halts at cryogenic temperatures, and resumes again at room temperature. Using our stepwise protocol, we achieve up to a 270% increase in junction resistance, corresponding to a reduction of nearly 2 GHz of the qubit transition frequency. These results establish the achievable range, relaxation behavior, and practical limits of electrical tuning, enabling post-fabrication mitigation of frequency crowding in quantum processors.

DOI
10.1088/2633-4356/ae7fe1
Comments
34 pages, 14 figures

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Josephson junctions are a key element of superconducting quantum technology, serving as the core building blocks of superconducting qubits. We present an experimental study on room-temperature electrical tuning of aluminum junctions, showing that voltage pulses can controllably increase their resistance and adjust the Josephson energy while maintaining qubit quality factors above 1 million. We find that the rate of resistance increase scales exponentially with pulse amplitude during manipulation, after which the spontaneous resistance increase scales proportionally to the amount of manipulation. We show that this spontaneous increase halts at cryogenic temperatures, and resumes again at room temperature. Using our stepwise protocol, we achieve up to a 270% increase in junction resistance, corresponding to a reduction of nearly 2 GHz of the qubit transition frequency. These results establish the achievable range, relaxation behavior, and practical limits of electrical tuning, enabling post-fabrication mitigation of frequency crowding in quantum processors.
Reproducibility of Al/AlO x /Al Josephson junctions is a challenge for scaling up superconducting quantum processors. The frequency uncertainty of the transmon qubits arising from the fabrication process is attributed to deviations in the Josephson junction microstructure and electrical properties. Here, we present a solution for this problem using the post-fabrication Josephson junction thermal annealing process. The developed thermal post-exposure method allows not only to increase the junction resistance by 175%, but also to decrease by 60% with a step of 10% in R n , which opens up new possibilities for tuning the frequency of qubits. The resistance is shown to be strongly temperature dependent, and is weakly dependent on the holding time. The linear dimensions of the electrodes and the sidewalls contribution to the total JJ area also have a significant impact on the final resistance after annealing. Finally, a theoretical model of the structure modification in a tunnel barrier with changes in oxygen concentration gradient is proposed. The proposed thermal annealing approach can be used to form stable and reproducible tunnel barriers and scalable frequency trimming for widely used fixed-frequency transmon qubits.
Variability in Josephson junction area and resistance remains a central challenge in scaling fixed-frequency superconducting qubit architectures, where resistance fluctuations translate into qubit-frequency dispersion and potential frequency collisions. Here, we present a fabrication strategy that combines large-area process control on 200 mm wafers with chip-level electrical fine-tuning to improve junction-resistance repeatability. Within a central 80 × 80 mm 2 field on 200 mm wafers, the Manhattan-style aluminum junction process yielded relative standard deviations of 5.1–5.2% in junction area (RSD A ) and 5.8–7.2% in room-temperature resistance (RSD R ). Alternating-bias assisted annealing (ABAA) further reduced chip-level RSD R to 1.3% in a chip with all 20 junctions tuned and to 1.7% for 16 tuned junctions in a cryogenically characterized 20-qubit chip. In a cross-chip comparison, the coherence distributions of the ABAA-treated chip and the untreated reference chip overlapped. These results show that large-area feed-forward correction and post-fabrication tuning can improve junction-parameter repeatability in fixed-frequency superconducting circuits.
Superconducting quantum processors are one of the leading platforms for realizing scalable fault-tolerant quantum computation (FTQC). The recent demonstration of post-fabrication tuning of Josephson junctions using alternating-bias assisted annealing (ABAA) technique and a reduction in junction loss after ABAA illuminates a promising path towards precision tuning of qubit frequency while maintaining high coherence. Here, we demonstrate precision tuning of the maximum∣0⟩→∣1⟩\vert 0\rangle\rightarrow\vert 1\rangle∣0⟩→∣1⟩transition frequency(f01max⁡)(f_{01}^{\max})(f01max​)of tunable transmon qubits by performing ABAA at room temperature using commercially available test equipment. We characterize the impact of junction relaxation and aging on resistance spread after tuning, and demonstrate a frequency equivalent tuning precision of 7.7 MHz (0.17%) based on targeted resistance tuning on hundreds of qubits, with a resistance tuning range up to 18.5%. Cryogenic measurements on tuned and untuned qubits show evidence of improved coherence after ABAA with no significant impact on tunability. Despite a small global offset, we show an empiricalf01max⁡f_{01}^{\max}f01max​tuning precision of 18.4 MHz by tuning a set of multi-qubit processors targeting their designed Hamiltonians. We experimentally characterize high-fidelity parametric resonance iSWAP gates on two ABAA-tuned 9-qubit processors with fidelity as high as 99.51±0.20%\pm 0.20{\%}±0.20%. On the best-performing device, we measured across the device a median fidelity of 99.22% and an average fidelity of 99.13$\pm$0.12%. Yield modeling analysis predicts high detuning-edge-yield using ABAA beyond the 1000-qubit scale. These results demonstrate the cutting-edge capability of frequency targeting using ABAA and open up a new avenue to systematically improving Hamiltonian targeting and optimization for scaling high-performance superconducting quantum processors.
Superconducting qubits are a promising route to achieving large-scale quantum computers. A key challenge in realising large-scale superconducting quantum processors involves mitigating frequency collisions. In this paper, we present an approach to tuning fixed-frequency qubits with the use of an electron beam to locally anneal the Josephson junction. We demonstrate the ability to both increase and decrease the junction barrier resistance. The technique shows an improvement in wafer scale frequency targetting by assessing the frequency collisions in our qubit architecture. Coherence measurements are also done to evaluate the performance before and after tuning. The tuning process utilises a standard electron beam lithography system, ensuring reproducibility and implementation by any group capable of fabricating these Josephson junctions. This technique has the potential to significantly improve the performance of large-scale quantum computing systems, thereby paving the way for the future of quantum computing.
Understanding the aging behavior of Josephson junctions and the effect of annealing on junction resistances is important in building large-scale superconducting quantum processors. Here we study the effects of aging of Al/AlOx/Al Josephson junctions under different storage conditions from immediately after fabrication up to 2 to 3 months. We find that the aging curve follows a logarithmic curve, with the aging amplitude mainly determined by fabrication conditions and the aging rate determined by both fabrication and storage conditions. Junctions stored at ambient laboratory conditions aged faster compared to junctions stored in a nitrogen atmosphere or vacuum, with the aging speed appreciably changes when the storage condition changed. We also compared the effect of thermal annealing under nitrogen environment with annealing under ambient conditions up to 250∘^\circ∘C. We find that under nitrogen environment, the resistances decreased at all temperatures tested, while under ambient environment the resistances increased at 200∘^\circ∘C and decreased at 250∘^\circ∘C instead. We were unable to decrease the resistance below the initial-time resistance, suggesting a lower limit on the range of resistance tuning.
The thesis investigates three challenges in superconducting quantum computing: efficient quantum gate compilation, scalable microwave interfacing of quantum processors (QPUs), and electrical annealing of Josephson junctions.The first part addresses an inefficiency in contemporary two-qubit gate compilation. Universal quantum computation requires only a single entangling two-qubit gate alongside single-qubit rotations, but this minimal gate set requires up to three additional two-qubit gates for every unsupported gate. I show how access to multiple inequivalent two-qubit gate classes overcomes this inefficiency. I experimentally realised an unsupported SWAP operation using one parametric CZ and one parametric iSWAP gate on a circuit-QED architecture. A Kraus-Cirac analysis shows that this combination belongs to the SWAP equivalency class, the fundamental reason for the reduction in two-qubit gates. The experiment demonstrates a rare case of simultaneous CZ and iSWAP support in the same quantum circuit, illustrating how access to multiple inequivalent gate classes can reduce compilation overhead on real hardware.The second part explores direct digital synthesis of microwave signals for interfacing with quantum processors. Conventional control uses heterodyne upconversion with IQ mixers, requiring compensation of LO leakage and IQ skew. I investigated a mixerless architecture based on high-speed DAC/ADC systems to generate and analyse the required microwave signals. CZ and iSWAP gate experiments subsequently verify that the platform is equivalent to conventional QPU setups.The third part investigates post-fabrication electrical tuning of Josephson junctions, in which voltage pulses modify junction resistance to correct fabrication-induced transmon-frequency variations. The speed of resistance change was found to depend exponentially on pulse amplitude. A novel stepwise protocol achieved a 270% resistance increase in an 11-month-old 11.5 kΩ junction, corresponding to a ~2 GHz reduction in transmon frequency, the largest reported selective resistance modification to date. Simulations show that resistance, charging-energy, and superconducting-gap uncertainties contribute equally to the uncertainty in the final qubit frequency. The results support a picture where electrical manipulation modifies the energy landscape, accelerating natural junction ageing.The thesis demonstrates that investigating gate-level compilation strategies, fully digital QPU control, and post-fabrication tuning, helps advance the understanding of how to approach scalable superconducting quantum processors.