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Scientific Reports

Aluminum Josephson junction microstructure and electrical properties modified by thermal annealing

Nikita D. Korshakov, Dmitry O. Moskalev, Anastasia A. Soloveva, Daria A. Moskaleva, Evgeniy S. Lotkov, Artem R. Ibragimov, Margarita V Androschuk, Ilya A. Ryzhikov, Yuri V. Panfilov, Ilya A. Rodionov

Published Oct 30, 2024• 9 citations
Publisher

Abstract

Reproducibility of Al/AlO x /Al Josephson junctions is a challenge for scaling up superconducting quantum processors. The frequency uncertainty of the transmon qubits arising from the fabrication process is attributed to deviations in the Josephson junction microstructure and electrical properties. Here, we present a solution for this problem using the post-fabrication Josephson junction thermal annealing process. The developed thermal post-exposure method allows not only to increase the junction resistance by 175%, but also to decrease by 60% with a step of 10% in R n , which opens up new possibilities for tuning the frequency of qubits. The resistance is shown to be strongly temperature dependent, and is weakly dependent on the holding time. The linear dimensions of the electrodes and the sidewalls contribution to the total JJ area also have a significant impact on the final resistance after annealing. Finally, a theoretical model of the structure modification in a tunnel barrier with changes in oxygen concentration gradient is proposed. The proposed thermal annealing approach can be used to form stable and reproducible tunnel barriers and scalable frequency trimming for widely used fixed-frequency transmon qubits.

DOI
10.1038/s41598-024-74071-7

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Abstract The most commonly used physical realization of superconducting qubits for quantum circuits is a transmon. There are a number of superconducting quantum circuits applications, where Josephson junction critical current reproducibility over a chip is crucial. Here, we report on a robust chip scale Al/AlO x /Al junctions fabrication method due to comprehensive study of shadow evaporation and oxidation steps. We experimentally demonstrate the evidence of optimal Josephson junction electrodes thickness, deposition rate and deposition angle, which ensure minimal electrode surface and line edge roughness. The influence of oxidation method, pressure and time on critical current reproducibility is determined. With the proposed method we demonstrate Al/AlO x /Al junction fabrication with the critical current variation $$(\sigma /\langle {I_{c} } \rangle )$$ ( σ / ⟨ I c ⟩ ) less than 3.9% (from 150 × 200 to 150 × 600 nm 2 area) and 7.7% (for 100 × 100 nm 2 area) over 20 × 20 mm 2 chip. Finally, we fabricate separately three 5 × 10 mm 2 chips with 18 transmon qubits (near 4.3 GHz frequency) showing less than 1.9% frequency variation between qubits on different chips. The proposed approach and optimization criteria can be utilized for a robust wafer-scale superconducting qubit circuits fabrication.

Scientific Reports•Mar 13, 2023•40 citations
Reproducibility of Al/AlO x /Al Josephson junctions is a challenge for scaling up superconducting quantum processors. The frequency uncertainty of the transmon qubits arising from the fabrication process is attributed to deviations in the Josephson junction microstructure and electrical properties. Here, we present a solution for this problem using the post-fabrication Josephson junction thermal annealing process. The developed thermal post-exposure method allows not only to increase the junction resistance by 175%, but also to decrease by 60% with a step of 10% in R n , which opens up new possibilities for tuning the frequency of qubits. The resistance is shown to be strongly temperature dependent, and is weakly dependent on the holding time. The linear dimensions of the electrodes and the sidewalls contribution to the total JJ area also have a significant impact on the final resistance after annealing. Finally, a theoretical model of the structure modification in a tunnel barrier with changes in oxygen concentration gradient is proposed. The proposed thermal annealing approach can be used to form stable and reproducible tunnel barriers and scalable frequency trimming for widely used fixed-frequency transmon qubits.
Superconducting qubits based on Al/AlOx/Al Josephson junction are one of the most promising candidates for the physical implementation of universal quantum computers. Due to scalability and compatibility with the state-of-the-art nanoelectronic processes one can fabricate hundreds of qubits on a single silicon chip. However, decoherence in these systems caused by two-level-systems in amorphous dielectrics, including a tunneling barrier AlOx, is one of the major problems. We report on a Josephson junction thermal annealing process development to crystallize an amorphous barrier oxide (AlOx). The dependences of the thermal annealing parameters on the room temperature resistance are obtained. The developed method allows not only to increase the Josephson junction resistance by 175%, but also to decrease by 60% with precisions of 10% in Rn. Finally, theoretical assumptions about the structure modification in tunnel barrier are proposed. The suggested thermal annealing approach can be used to form a stable and reproducible tunneling barriers and scalable frequency trimming for a widely used fixed-frequency transmon qubits.
Josephson junctions are key elements of superconducting quantum technology, serving as the core building blocks of superconducting qubits. We present an experimental study on room-temperature electrical tuning of aluminum junctions, showing that voltage pulses can controllably increase their resistance and adjust the Josephson energy while maintaining qubit quality factors above 1 million. We find that the rate of resistance increase scales exponentially with pulse amplitude during manipulation. Following the manipulation, the resistance increases spontaneously through contributions proportional to both the initial resistance and the preceding manipulation. We show that this spontaneous increase halts at cryogenic temperatures, and resumes again at room temperature. Using our stepwise protocol, we achieve up to a 270% increase in junction resistance, corresponding to a reduction of nearly 2 GHz of the qubit transition frequency. These results establish the achievable range, relaxation behavior, and practical limits of electrical tuning, enabling post-fabrication mitigation of frequency crowding in quantum processors.
We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with T1 relaxation times averaging above 50 μs (Q>1.5×106). Current shadow-evaporation techniques for aluminum-based Josephson junctions require a separate lithography step to deposit a patch that makes a galvanic, superconducting connection between the junction electrodes and the circuit wiring layer. The patch connection eliminates parasitic junctions, which otherwise contribute significantly to dielectric loss. In our patch-integrated cross-type junction technique, we use one lithography step and one vacuum cycle to evaporate both the junction electrodes and the patch. This eliminates a key bottleneck in manufacturing superconducting qubits by reducing the fabrication time and cost. In a study of more than 3600 junctions, we show an average resistance variation of 3.7% on a wafer that contains forty 0.5×0.5-cm2 chips, with junction areas ranging between 0.01 and 0.16 μm2. The average on-chip spread in resistance is 2.7%, with 20 chips varying between 1.4% and 2%. For the junction sizes used for transmon qubits, we deduce a wafer-level transition-frequency variation of 1.7%–2.5%. We show that 60%–70% of this variation is attributed to junction-area fluctuations, while the rest is caused by tunnel-junction inhomogeneity. Such high frequency predictability is a requirement for scaling-up the number of qubits in a quantum computer.
Abstract We demonstrate a transformational technique for controllably tuning the electrical properties of individual aluminum-oxide tunnel junctions. Using conventional test equipment to apply an alternating bias to a heated tunnel barrier, giant increases in the room temperature resistance, greater than 70%, can be achieved. The rate of resistance change is shown to be strongly temperature- dependent, and is weakly dependent on junction size in the sub-micron regime. In order to measure their tunneling properties at mK temperatures, we characterized transmon qubit junctions treated with this alternating-bias assisted annealing (ABAA) technique. The measured frequencies follow the Ambegaokar-Baratoff relation between the shifted resistance and critical current. Further, these studies show a reduction of junction-contributed loss on the order of ≈ 0.3 × 10−6, and indicate that there is a reduction in resonant-and off-resonant-two level system defects when compared to untreated samples. Imaging with high-resolution TEM shows that the barrier is still predominantly amorphous with a more uniform distribution of aluminum coordination across the barrier relative to untreated junctions. This new approach is expected to be widely applicable to a broad range of devices that rely on amorphous aluminum oxide, and is likely applicable to many other metal- insulator-metal devices.
Reproducible Josephson junction (JJ) characteristics are essential for frequency-deterministic and scalable superconducting quantum processors. We show that the normal-state resistance and its reproducibility in Al/AlOx/Al JJs are governed not by oxide thickness, but by fabrication-history–induced disorder in the tunneling barrier. By comparing junctions fabricated on bare wafers, lift-off–processed base layers, and dry-etched base layers under identical oxidation conditions, we observe large differences in resistance and wafer-to-wafer variability. Atomic force microscopy reveals distinct surface disorder imprinted by prior fabrication steps, while cross-sectional transmission electron microscopy show that the average AlOx barrier thickness is comparable across the three fabrication histories within experimental uncertainty. The enhanced resistance on rough, plasma-damaged surfaces therefore originates from nanoscale barrier disorder rather than thickness variations. These results establish fabrication history as a key determinant of JJ barrier quality and highlight the need for holistic process control to achieve deterministic qubit frequency targeting.
Abstract The most commonly used physical realization of superconducting qubits for quantum circuits is a transmon. There are a number of superconducting quantum circuits applications, where Josephson junction critical current reproducibility over a chip is crucial. Here, we report on a robust chip scale Al/AlO x /Al junctions fabrication method due to comprehensive study of shadow evaporation and oxidation steps. We experimentally demonstrate the evidence of optimal Josephson junction electrodes thickness, deposition rate and deposition angle, which ensure minimal electrode surface and line edge roughness. The influence of oxidation method, pressure and time on critical current reproducibility is determined. With the proposed method we demonstrate Al/AlO x /Al junction fabrication with the critical current variation (σ/⟨Ic⟩)(\sigma /\langle {I_{c} } \rangle )(σ/⟨Ic​⟩) ( σ / ⟨ I c ⟩ ) less than 3.9% (from 150 × 200 to 150 × 600 nm 2 area) and 7.7% (for 100 × 100 nm 2 area) over 20 × 20 mm 2 chip. Finally, we fabricate separately three 5 × 10 mm 2 chips with 18 transmon qubits (near 4.3 GHz frequency) showing less than 1.9% frequency variation between qubits on different chips. The proposed approach and optimization criteria can be utilized for a robust wafer-scale superconducting qubit circuits fabrication.