Compatibility with noisy intermediate-scale quantum (NISQ) devices is crucial for the realistic implementation of quantum cryptographic protocols. We investigate a cryptographic scheme based on discrete-time quantum walks (DTQWs) on cyclic graphs that exploits Parrondo dynamics, wherein periodic evolution emerges from a deterministic sequence of individually chaotic coin operators. We construct an explicit quantum circuit realization tailored to NISQ architectures and analyze its performance through numerical simulations in Qiskit under both ideal and noisy conditions. Protocol performance is quantified using probability distributions, Hellinger fidelity, and total variation distance. To assess security at the circuit level, we model intercept-resend and man-in-the- middle attacks and evaluate the resulting quantum bit error rate. In the absence of adversarial intervention, the protocol enables reliable message recovery, whereas eavesdropping induces characteristic disturbances that disrupt the periodic reconstruction mechanism. We further examine hardware feasibility on contemporary NISQ processors, specifically ibm_torino, incorporating qubit connectivity and state-transfer constraints into the circuit design. Our analysis demonstrates that communication between spatially separated logical modules increases circuit depth via SWAP operations, leading to cumulative noise effects. By exploring hybrid state-transfer strategies, we show that qubit selection and connectivity play a decisive role in determining fidelity and overall protocol performance, highlighting hardware-dependent trade-offs in NISQ implementations.
Compatibility with noisy intermediate-scale quantum (NISQ) devices is crucial for the realistic implementation of quantum cryptographic protocols. We investigate a cryptographic scheme based on discrete-time quantum walks (DTQWs) on cyclic graphs that exploits Parrondo dynamics, wherein periodic evolution emerges from a deterministic sequence of individually chaotic coin operators. We construct an explicit quantum circuit realization tailored to NISQ architectures and analyze its performance through numerical simulations in Qiskit under both ideal and noisy conditions. Protocol performance is quantified using probability distributions, Hellinger fidelity, and total variation distance. To assess security at the circuit level, we model intercept-resend and man-in-the- middle attacks and evaluate the resulting quantum bit error rate. In the absence of adversarial intervention, the protocol enables reliable message recovery, whereas eavesdropping induces characteristic disturbances that disrupt the periodic reconstruction mechanism. We further examine hardware feasibility on contemporary NISQ processors, specifically ibm_torino, incorporating qubit connectivity and state-transfer constraints into the circuit design. Our analysis demonstrates that communication between spatially separated logical modules increases circuit depth via SWAP operations, leading to cumulative noise effects. By exploring hybrid state-transfer strategies, we show that qubit selection and connectivity play a decisive role in determining fidelity and overall protocol performance, highlighting hardware-dependent trade-offs in NISQ implementations.
Advancements in noisy intermediate-scale quantum (NISQ) computing are steadily pushing these systems toward outperforming classical supercomputers on specific well-defined computational tasks. In this work we explore and control quantum chaos in NISQ systems using discrete-time quantum walks (DTQWs) on cyclic graphs. To efficiently implement quantum walks on NISQ hardware, we employ the quantum Fourier transform to diagonalize the conditional shift operator, optimizing circuit depth and fidelity. We experimentally realize the transition from quantum chaos to order via DTQW dynamics on both odd and even cyclic graphs, specifically 3- and 4-cycle graphs, using the counterintuitive Parrondo paradox strategy across three different NISQ devices. While the 4-cycle graphs exhibit high-fidelity quantum evolution, the 3-cycle implementation shows significant fidelity improvement when augmented with dynamical decoupling pulses. Our results demonstrate a practical approach to probing and harnessing controlled chaotic dynamics on real quantum hardware, laying the groundwork for future quantum algorithms and cryptographic protocols based on quantum walks.
Abstract This research investigates the critical role of quantum measurement reliability in the performance and security of quantum cryptography protocols, specifically focusing on the impact of noisy intermediate-scale quantum (NISQ) devices. Through a series of experimental studies conducted using quantum gates on IBM quantum computers (ibm_brisbane and ibm_torino), we analyze how measurement errors affect key performance indicators such as Quantum Bit Error Rate (QBER) and state fidelity. Our findings demonstrate that even minor inaccuracies in quantum measurements can significantly compromise the security and efficiency of quantum key distribution (QKD) protocols. We provide a comprehensive statistical analysis of the experimental data, including confidence intervals and error propagation, to quantify these effects. Furthermore, we delve into potential attack models, such as intercept-resend and Trojan-horse attacks, and discuss their susceptibility to measurement imperfections. This study highlights the urgent need for robust error mitigation and correction techniques to ensure the practical viability and cryptographic strength of quantum communication systems in the evolving quantum era.
We propose a quantum circuit design for implementing coined quantum walks on complex networks. In complex networks, the coin and shift operators depend on the varying degrees of the nodes, which makes circuit construction more challenging than for regular networks. To address this issue, we use a dual-register encoding to enable a simplified shift operator and reduces the resource overhead. We implement the circuit using Qmod, a high-level quantum programming language, and evaluated the performance through numerical simulations on Erdős-Rényi, Watts-Strogatz, and Barabási-Albert models. The results show that the circuit depth scales as approximately N1.9 regardless of the network topology. Furthermore, we execute the proposed circuits on the ibm\_torino superconducting quantum processor for Watts-Strogatz models with N=4 and N=8. The experiments show that hardware-aware optimization slightly improved the variation distance and Hellinger fidelity for the larger network, whereas connectivity constraints imposed overhead for the smaller one. These results indicate that while current NISQ devices are limited to small-scale validations, the polynomial scaling of our framework makes it suitable for larger-scale implementations in the fault-tolerant quantum computing era.
Noisy Intermediate-Scale Quantum (NISQ) computers impose severe architectural constraints that prevent direct execution of logical quantum circuits. As a result, quantum circuit mapping—transforming ideal circuits into hardware-compatible forms—has become a critical task in quantum software toolchains. This paper presents a comparative study of key mapping techniques, focusing on circuit depth, SWAP gate overhead, and fidelity awareness. Through a case analysis on a 5-qubit Quantum Fourier Transform (QFT) circuit, we demonstrate the performance trade-offs of several prominent mapping strategies, including naive greedy routing, Qiskit’s SABRE, and CQC’s t|ket>. Our findings reveal that mapping technique selection has a profound impact on circuit quality and feasibility on real NISQ hardware.
In this work, we map noisy intermediate-scale quantum (NISQ)-friendly implementations of the noninteracting quantum cellular automata (QCA) to a circuit quantum electrodynamics (cQED) hardware. We perform both noiseless and noisy simulations of the QCA one-particle sector, namely, the quantum walk, on N -cycles and N × N torus graphs. Moreover, within this framework, we also investigate the search problem and present a circuit for preparing the state (i.e., the Dicke state with Hamming weight 1) using only 1 iSWAP gates and no ancilla qubits. The noiseless simulations are conducted with the Qiskit Aer simulator, while the noisy simulations with C12 Quantum Electronics’ in-house noisy emulator, . We benchmark the performance of our implementations by analyzing the simulations via relevant metrics and quantities such as the state count distributions, the Hellinger fidelity, the ℓ 1 distance, the hitting time, and the success probability. Our results demonstrate that the QCA framework, in combination with cQED processors, holds promise as an effective platform for early NISQ implementations of quantum walk and quantum walk search algorithms.
The advent of noisy intermediate-scale quantum (NISQ) devices has not only opened up new possibilities to studying quantum computational benefits, but it has also presented new challenges associated with noise and short coherence times. Entanglement is one of the inherent resources that can be used to perform quantum computation and implement the performance and reliability of quantum algorithms. This paper looks at entanglement dynamics in NISQ machines subjected to natural noises. The study focuses on the problem of examining the role of various noise channels in the creation, dynamics, and decay of the entanglement during quantum operations, such as depolarizing, amplitude damping, and phase damping. The study is based on theoretical modeling and numerical simulations of multi-qubit quantum circuits to determine the stability of entangled states with respect to circuit depth and intensity of noise. Concurrence and von Neumann entropy are examples of entanglement measures that are used to characterize correlations between qubits as well as to trace the dynamics of these correlations across computational interactions. The results show that noise has major impacts on entanglement distribution, which tends to cause rapid decays in highly entangled states with increase in circuit complexity. The findings, however, also show that there are some circuit architectures and error-mitigation schemes that can somewhat sustain entanglement with moderate levels of noise. The paper also emphasizes the relevance of minimalizing sequence of gates, and reduced circuit depth in an effort to preserve useful entanglement in present-day quantum hardware. These observations help in understanding the behaviour of quantum correlations better in real world quantum devices and provide a way of developing more resilient quantum algorithms that would work on NISQ systems. In general, the article offers a systematic view on entanglement behavior in disordered quantum systems and highlights its value in the development of quantum computing applications in the near term.