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arXiv:2505.14134 · Physical Review Research

Noisy simulations of quantum walk and quantum walk search via quantum cellular automata on a semiconducting spin processor emulator

Andrea Mammola, Q. Schaeverbeke, Giuseppe Di Molfetta

Published Dec 8, 2025• 0 citations
arXivHTMLPDF

Abstract

In this work, we map noisy intermediate-scale quantum (NISQ)-friendly implementations of the noninteracting quantum cellular automata (QCA) to a circuit quantum electrodynamics (cQED) hardware. We perform both noiseless and noisy simulations of the QCA one-particle sector, namely, the quantum walk, on N -cycles and N × N torus graphs. Moreover, within this framework, we also investigate the search problem and present a circuit for preparing the state (i.e., the Dicke state with Hamming weight 1) using only 1 iSWAP gates and no ancilla qubits. The noiseless simulations are conducted with the Qiskit Aer simulator, while the noisy simulations with C12 Quantum Electronics’ in-house noisy emulator, . We benchmark the performance of our implementations by analyzing the simulations via relevant metrics and quantities such as the state count distributions, the Hellinger fidelity, the ℓ 1 distance, the hitting time, and the success probability. Our results demonstrate that the QCA framework, in combination with cQED processors, holds promise as an effective platform for early NISQ implementations of quantum walk and quantum walk search algorithms.

DOI
10.1103/wc4h-thmg

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In this work, we map noisy intermediate-scale quantum (NISQ)-friendly implementations of the noninteracting quantum cellular automata (QCA) to a circuit quantum electrodynamics (cQED) hardware. We perform both noiseless and noisy simulations of the QCA one-particle sector, namely, the quantum walk, on N -cycles and N × N torus graphs. Moreover, within this framework, we also investigate the search problem and present a circuit for preparing the state (i.e., the Dicke state with Hamming weight 1) using only 1 iSWAP gates and no ancilla qubits. The noiseless simulations are conducted with the Qiskit Aer simulator, while the noisy simulations with C12 Quantum Electronics’ in-house noisy emulator, . We benchmark the performance of our implementations by analyzing the simulations via relevant metrics and quantities such as the state count distributions, the Hellinger fidelity, the ℓ 1 distance, the hitting time, and the success probability. Our results demonstrate that the QCA framework, in combination with cQED processors, holds promise as an effective platform for early NISQ implementations of quantum walk and quantum walk search algorithms.
Compatibility with noisy intermediate-scale quantum (NISQ) devices is crucial for the realistic implementation of quantum cryptographic protocols. We investigate a cryptographic scheme based on discrete-time quantum walks (DTQWs) on cyclic graphs that exploits Parrondo dynamics, wherein periodic evolution emerges from a deterministic sequence of individually chaotic coin operators. We construct an explicit quantum circuit realization tailored to NISQ architectures and analyze its performance through numerical simulations in Qiskit under both ideal and noisy conditions. Protocol performance is quantified using probability distributions, Hellinger fidelity, and total variation distance. To assess security at the circuit level, we model intercept-resend and man-in-the- middle attacks and evaluate the resulting quantum bit error rate. In the absence of adversarial intervention, the protocol enables reliable message recovery, whereas eavesdropping induces characteristic disturbances that disrupt the periodic reconstruction mechanism. We further examine hardware feasibility on contemporary NISQ processors, specifically ibm_torino, incorporating qubit connectivity and state-transfer constraints into the circuit design. Our analysis demonstrates that communication between spatially separated logical modules increases circuit depth via SWAP operations, leading to cumulative noise effects. By exploring hybrid state-transfer strategies, we show that qubit selection and connectivity play a decisive role in determining fidelity and overall protocol performance, highlighting hardware-dependent trade-offs in NISQ implementations.
Simulation and programming of current quantum computers as Noisy Intermediate-Scale Quantum (NISQ) devices represent a hot topic at the border of current physical and information sciences. The quantum walk process represents a basic subroutine in many quantum algorithms and plays an important role in studying physical phenomena. Simulating quantum walk processes is computationally challenging for classical processors. With an increasing improvement in qubits fidelity and qubits number in a single register, there is a potential to improve quantum walks simulations substantially. However, efficient ways to simulate quantum walks in qubit registers still have to be explored. Here, we explore the relationship between quantum walk on graphs and quantum circuits. Firstly, we discuss ways to obtain graphs provided quantum circuit. We then explore techniques to represent quantum walk on a graph as a quantum circuit. Specifically, we study hypercube graphs and arbitrary graphs. Our approach to studying the relationship between graphs and quantum circuits paves way for the efficient implementation of quantum walks algorithms on quantum computers.
Simulations of quantum-dot cellular automata (QCA) on classical computers are highly limited due to the exponential growth in resources required for the numerical simulation of quantum mechanics involving networks of finite state nodes. Recent advancements in computing based on networks of flux-qubits, and in particular the platform technology developed by D-Wave Systems Inc., have made it possible to explore QCA networks that are intractable on classical machines. However, the embedding of such networks onto the available processor architecture is a key challenge in setting up such simulations. In this work, two approaches to embedding QCA circuits are characterized: a dense placement algorithm that uses a routing method based on negotiated congestion; and a heuristic method implemented in D-Wave's SAPI package. Both embedding methods are characterized using a set of basic QCA benchmark circuits of various sizes and complexities. When including diagonal interactions only in the case of an inverter, both methods were able to embed a 4-bit 2-1 multiplexer circuit containing 192 non-driver QCA cells onto the 512 qubit D-Wave Vesuvius chip architecture. Including diagonal interactions for all cells, both methods successfully embedded a serial adder circuit containing 126 non-driver cells.
Abstract Quantum search algorithm (also known as Grover's algorithm) lays the foundation for many other quantum algorithms. Although it is very simple, its implementation is limited on noisy intermediate-scale quantum (NISQ) processors. Grover's algorithm was designed without considering the physical resources, such as depth, in the real implementations. Therefore, Grover's algorithm can be improved for NISQ devices. In this paper, we demonstrate how to implement quantum search algorithms better on NISQ devices. We present detailed benchmarks of the five-qubit quantum search algorithm on different quantum processors, including IBMQ, IonQ, and Honeywell quantum devices. We report the highest success probability of the five-qubit search algorithm compared to previous works. Our results show that designing the error-aware quantum search algorithms is possible, which can maximally harness the power of NISQ computers.
Abstract This practical guide presents methods for constructing noise models using the Qiskit Aer noise module within the IBM Q ecosystem. The objective is to simulate quantum circuits under realistic error conditions, enabling accurate emulation of noisy quantum processors. The guide demonstrates how to: Use the Qiskit Aer noise module to define custom noise models. Incorporate gate errors, readout errors, and decoherence effects into simulations. Apply noise channels (e.g., depolarizing, amplitude damping, phase damping). Attach noise models to quantum circuit simulations. Analyze how noise affects algorithm performance and output distributions. Building noise models is essential for studying the behavior of quantum algorithms in the NISQ (Noisy Intermediate-Scale Quantum) era. It allows researchers to evaluate algorithm robustness, optimize circuit depth, and test error mitigation strategies before execution on real IBM Quantum hardware. This approach provides a bridge between ideal theoretical circuits and physically realistic quantum devices, enhancing the reliability and applicability of quantum computing experiments.
Advancements in computing based on qubit networks, and in particular the flux-qubit processor architecture developed by D-Wave System's Inc., have enabled the physical simulation of quantum-dot cellular automata (QCA) networks beyond the limit of classical methods. However, the embedding of QCA networks onto the available processor architecture is a key challenge in preparing such simulations. In this work, two approaches to embedding QCA circuits are characterized: a dense placement algorithm that uses a routing method based on negotiated congestion; and a heuristic method implemented in D-Wave's Solver API package. A set of benchmark QCA networks is used to characterise the algorithms and a stochastic circuit generator is employed to investigate the performance for different processor sizes and active flux-qubit yields.