Advancements in computing based on qubit networks, and in particular the flux-qubit processor architecture developed by D-Wave System's Inc., have enabled the physical simulation of quantum-dot cellular automata (QCA) networks beyond the limit of classical methods. However, the embedding of QCA networks onto the available processor architecture is a key challenge in preparing such simulations. In this work, two approaches to embedding QCA circuits are characterized: a dense placement algorithm that uses a routing method based on negotiated congestion; and a heuristic method implemented in D-Wave's Solver API package. A set of benchmark QCA networks is used to characterise the algorithms and a stochastic circuit generator is employed to investigate the performance for different processor sizes and active flux-qubit yields.
Advancements in computing based on qubit networks, and in particular the flux-qubit processor architecture developed by D-Wave System's Inc., have enabled the physical simulation of quantum-dot cellular automata (QCA) networks beyond the limit of classical methods. However, the embedding of QCA networks onto the available processor architecture is a key challenge in preparing such simulations. In this work, two approaches to embedding QCA circuits are characterized: a dense placement algorithm that uses a routing method based on negotiated congestion; and a heuristic method implemented in D-Wave's Solver API package. A set of benchmark QCA networks is used to characterise the algorithms and a stochastic circuit generator is employed to investigate the performance for different processor sizes and active flux-qubit yields.
Simulations of quantum-dot cellular automata (QCA) on classical computers are highly limited due to the exponential growth in resources required for the numerical simulation of quantum mechanics involving networks of finite state nodes. Recent advancements in computing based on networks of flux-qubits, and in particular the platform technology developed by D-Wave Systems Inc., have made it possible to explore QCA networks that are intractable on classical machines. However, the embedding of such networks onto the available processor architecture is a key challenge in setting up such simulations. In this work, two approaches to embedding QCA circuits are characterized: a dense placement algorithm that uses a routing method based on negotiated congestion; and a heuristic method implemented in D-Wave's SAPI package. Both embedding methods are characterized using a set of basic QCA benchmark circuits of various sizes and complexities. When including diagonal interactions only in the case of an inverter, both methods were able to embed a 4-bit 2-1 multiplexer circuit containing 192 non-driver QCA cells onto the 512 qubit D-Wave Vesuvius chip architecture. Including diagonal interactions for all cells, both methods successfully embedded a serial adder circuit containing 126 non-driver cells.
The limits to miniaturization of electronic devices are reached with sizes where quantum mechanics rules over the dynamics of the system. Because of this, enormous efforts are being made in search of new technologies to store and process information that can efficiently replace classic electronics. The proposal for quantum systems for carrying out computation represents an attempt to create a new generation of information processors (Nielsen & Chuang, 2003). The major advantage of quantum computation is that it can resolve numeric problems that cannot be resolved by classical computation. However, there remains the unresolved problem of the coherence of the proposed systems. Some significant advances have been made in addressing these problems using dislocated qubits with global control protocols (Fitzsimons et al., 2007), with small molecular systems. On the other hand, a completely different solution to quantum computation has been attempted using cellular automata architecture to develop classical computational processes with quantum entities. Important advances have been made with automata based on quantum dot arrays (QCA), the idea for which was proposed by C. Lent and collaborators (Lent et al., 1993). The original idea was introduced as a system of quantum corrals with
The design and understanding of quantum-dot cellular automata (QCA) networks has been largely influenced by limitations in the approximation methods used in common design tools. In some cases, such limitations have led to unrealistic selections of clock zones which are not feasible for nanoscale QCA implementations given current fabrication constraints on clocking electrodes. A better understanding of the behaviour of larger QCA networks of perhaps tens to hundreds of QCA devices is needed. One approach is by investigating the low energy spectrum; however, diagonalization of the system Hamiltonian even in the 2-state approximation is impractical beyond 20 or so devices. In this work, we present a methodology for understanding the spectrum of the full network in terms of contributions from components of the network. We show that important features of the low energy spectrum can be attributed to specific critical components, and present one scheme for decomposing the network into these components. In addition, we address the question of computing the low energy spectrum of large QCA networks. A method based on basis reduction which naturally emerges from the component decomposition is successfully applied to a 49 cell XOR gate with results compared against a density matrix renormalization group implementation.
The design of arithmetic and logical unit is a crucial block schematic of quantum computing, which has gained popularity in recent years. While division is a successive subtraction, a logical multiplier employs the technique of successive addition, which are the essential blocks of the quantum computing. The key components including comparator design, adders, and subtractors are considered with the help of Quantum-Dot Cellular Automata (QCA) in this work. Such essential blocks of the Arithmetic Logic Unit (ALU) are designed, implemented, and tested in the simulation using QCADesigner version 2.0.3. The results are found to be appealing with the standard truth tables of the above logical circuits. Hence, the designs could be utilized in the practical applications of Internet of Things, Block chains and Cryptographic solutions catering to the challenges of industry, healthcare and finance sectors. Addressing challenges such as a reduced number of qubits and complexity reduction could make way for more robust and practical ALU designs in QCA-based quantum systems. In the proposed novel work, the number of qubits required has been reduced to 24, offering a notable reduction compared to several recent approaches. Hence, the novelty of the work lies in the architectural-level reorganization and logic-level minimization strategy, which collectively enable a significant reduction in design complexity (up to 93%) without introducing additional fabrication or simulation overhead, optimizing clock zone assignments to enhance timing efficiency.
Critical decision-making issues in science, engineering, and industry are based on combinatorial optimization; however, its application is inherently limited by the NP-hard nature of the problem. A specialized paradigm of analogue quantum computing, quantum annealing (QA), has been proposed to solve these problems by encoding optimization problems into physical energy landscapes and solving them by quantum tunnelling systematically through exploration of solution space. This is a critical review that summarizes the current applications of quantum annealing to combinatorial optimization and includes a theoretical background, hardware designs, algorithm implementation strategies, encoding and embedding schemes, protocols to benchmark quantum annealing, areas of implementation, and links with the quantum algorithms implementation with gate-based hardware and classical solvers. We develop a unified framework, relating adiabatic quantum dynamics, Ising and QUBO models, stoquastic and non-stoquastic Hamiltonians, and diabatic transitions to modern flux-qubit annealers (Chimera, Pegasus, Zephyr topologies), and emergent architectures (Lechner-Hauke-Zoller systems, Rydberg atom platforms), and hybrids of quantum and classical computation. Through our analysis, we find that overhead in embedding and encoding is the largest determinant of the scalability and performance (this is not just the number of qubits). Minor embeddings also usually have a physical qubit count per logical variable of between 5 and 12 qubits, which limits effective problem capacity by 80-92% and, due to chain-breaking errors, compromises the quality of solutions.
This paper proposes a novel approach to quantum algorithm design by leveraging the principles of cellular automata (CA). The core idea is to utilize CA as a hardware abstraction layer for quantum computation, mimicking the evolution rules of qubits. This allows for a parallelized design and optimization of quantum algorithms. Specifically, quantum gates are mapped to CA rules, enabling the simulation of qubit superposition and entanglement through cellular interactions and information transfer. This work explores the theoretical framework and outlines a methodology for designing quantum algorithms using CA, focusing on the potential for enhanced computational efficiency and scalability. The design methodology includes defining the CA grid, encoding quantum states into cellular configurations, translating quantum gates into CA rule updates, and analyzing the resulting algorithm execution. The presented framework offers a fundamentally different perspective on quantum algorithm development, potentially bridging the gap between classical algorithmic design and the unique characteristics of quantum systems. Further research will focus on exploring specific quantum algorithms and evaluating the performance of the CA-based approach.