Non-unitary protocols are already at the base of many hybrid quantum computing applications, especially in the noisy intermediate-scale quantum (NISQ) era where quantum errors typically affect the unitary evolution. However, while the framework for Parameterized Quantum Circuits is widely developed, especially for applications where the parameters are optimized towards a set goal, we find there are still interesting opportunities in defining a unified framework also for non-unitary protocols in the form of Parameterized Quantum Channels as a computing resource. We first discuss the general parameterization strategies for controlling quantum channels and their practical realizations. Then we describe a simple example of application in the context of error mitigation, where the control parameters for the quantum channels are optimized in the presence of noise, in order to maximize channel fidelity with respect to a given target channel.
Non-unitary protocols are already at the base of many hybrid quantum computing applications, especially in the noisy intermediate-scale quantum (NISQ) era where quantum errors typically affect the unitary evolution. However, while the framework for Parameterized Quantum Circuits is widely developed, especially for applications where the parameters are optimized towards a set goal, we find there are still interesting opportunities in defining a unified framework also for non-unitary protocols in the form of Parameterized Quantum Channels as a computing resource. We first discuss the general parameterization strategies for controlling quantum channels and their practical realizations. Then we describe a simple example of application in the context of error mitigation, where the control parameters for the quantum channels are optimized in the presence of noise, in order to maximize channel fidelity with respect to a given target channel.
The primary aim of the thesis is to introduce and investigate an original protocol for the design and the optimization of parameterized noisy quantum channels, with the goal of mitigating hardware-induced noise. Significant attention is also devoted to the design of noise models, which are essential for emulation purposes. The protocol begins with the derivation of a noise model for a hardware gate, represented as a quantum channel, that can be simulated classically. This task is achieved through process tomography, a procedure that enables the characterization of the channel. It should be noted that such simulation is feasible on classical computers, since the optimization task concerns low-dimensional gates typically acting on 2–3 qubits. The noisy channel is then engineered by embedding it into a probabilistic ensemble of circuits, in which additional single-qubit parameterized gates — assumed to be noiseless — are introduced. Through this procedure, the noisy channel becomes parameterized and can be optimized according to an appropriate metric. Following a worst-case, agnostic perspective, we choose the diamond distance between the noisy channel and the target unitary channel as the cost function. This metric is generally considered the most suitable for distinguishing quantum channels. The resulting optimal ensemble of circuits can be implemented on real hardware under fixed calibration conditions, yielding a channel that approximates the target more closely than the original noisy channel. This approach can be interpreted as a noise mitigation strategy based on pre-processing design and optimization: rather than correcting errors after the computation, less noisy channels are employed during the computation itself. In this context, the protocol — within the noise-aware variational quantum compiling framework — shares with the randomized compiling the principle of circuit dressing to tailor noise during execution. The methodology is validated on two toy models of the single-qubit identity with amplitude damping noise, combining both analytical and numerical approaches. The analysis highlights the role of convexity in the space of quantum channels, with explicit demonstrations of optimal convex combinations and connections to encoding-decoding and dynamical decoupling strategies. The analysis of these simple models is intended as a proof-of-principle of the protocol in a controlled and well-characterized environment. In addition, this thesis introduces the design of random noise models that are constrained to maintain a fixed diamond distance from a target quantum channel. The controlled addition of random noise to a unitary channel represents a significant and — to our knowledge — previously unexplored approach within noise modeling. Indeed, in principle, the currently available built-in noise models may limit the expressivity of the emulation. The task was achieved by enriching the noise spectrum through the addition of random Kraus operators and small systematic rotations. To assess the effects of hardware-induced noise, we proposed an experimental design aimed at simulating the time evolution of a triangular Ising model in a transverse field. Our approach employs Trotterization, adapted to the topology and connectivity of a certain quantum processing unit (QPU) profile. Building on the noisy native gates of the QPU profile, we propose the emulation, engineering and optimization of a noisy CZ gate, subsequently employed within sequences of non-native gates. Using the designed noise models, we perform several emulations aimed at evaluating the effectiveness of the protocol in the presence of progressively dominant systematic rotations, and at comparing it with Pauli twirling, a technique of randomized compiling.
Abstract Suppressing errors is one of the central challenges in achieving reliable quantum computation on near-term hardware. While much attention has been paid to error correction and mitigation, we identify quantum circuit structure itself as a powerful lever for proactive error suppression. In this work, we present a unified and hardware-adaptive framework for noise-aware quantum circuit design, in which circuit topology and parameters are co-optimized from the ground up based on the noise profile of the target backend. Our framework supports a wide range of quantum tasks-including circuit compilation, quantum state preparation, and unitary approximation-under a consistent optimization paradigm. Extensive experiments on five IBM backends confirm the effectiveness of our method, showing significant fidelity gains across all tasks under realistic noise. These results demonstrate that noise suppression through structure-aware design offers a powerful and generalizable strategy for enhancing circuit performance on NISQ hardware. Our framework bridges low-level hardware constraints with high-level circuit synthesis, paving the way for more robust and efficient quantum programming in the presence of noise.
Noisy Intermediate-Scale Quantum (NISQ) devices are promising platforms for practical quantum computing, but their performance is significantly affected by limited qubit availability, gate errors, decoherence, circuit depth, and hardware-dependent noise. Conventional quantum circuits are generally designed and optimized before execution and may not respond effectively to changing hardware conditions during computation. This research proposes a Self-Adaptive Quantum Circuit framework that dynamically modifies quantum circuits according to the current computational resources and noise characteristics of NISQ devices. The proposed framework monitors parameters such as qubit fidelity, gate error rates, circuit depth, execution time, and resource availability, and automatically selects suitable circuit configurations to improve computational performance. Adaptive mechanisms can be employed to reduce unnecessary gates, optimize qubit utilization, and mitigate the impact of hardware noise while maintaining the required computational accuracy. The framework will be evaluated using simulation platforms and available NISQ quantum hardware, comparing adaptive circuits with conventional static circuits using metrics such as accuracy, fidelity, circuit depth, gate count, execution time, and error rate. The expected outcome is a resource-efficient and noise-aware quantum circuit optimization approach capable of improving the reliability and performance of quantum applications on near-term quantum hardware. The proposed research aims to contribute toward more practical, flexible, and hardware-aware quantum computing systems for NISQ-era applications. Keywords: NISQ Computing, Self-Adaptive Quantum Circuits, Quantum Circuit Optimization, Quantum Error Mitigation, Quantum Noise, Quantum Computing.
In the current era of Noisy Intermediate-Scale Quantum (NISQ) technology, the practical use of quantum computers remains inhibited by our inability to aptly decouple qubits from their environment to mitigate computational errors. In this work, we introduce an approach by which knowledge of a qubit's initial quantum state and the standard parameters describing its decoherence can be leveraged to mitigate the noise present during the execution of a single-qubit gate. We benchmark our protocol using cloud-based access to IBM quantum processors. On ibmq_rome, we demonstrate a reduction of the single-qubit error rate by 38%, from 1.6×10−3 to 1.0×10−3, provided the initial state of the input qubit is known. On ibmq_bogota, we prove that our protocol will never decrease gate fidelity, provided the system's T1 and T2 times have not drifted above 100 times their assumed values. The protocol can be used to reduce quantum state preparation errors, as well as to improve the fidelity of quantum circuits for which some knowledge of the qubits' intermediate states can be inferred. This work presents a pathway to using information about noise levels and quantum state distributions to significantly reduce error rates associated with quantum gates via optimized decomposition into native gates.
Variational quantum algorithms (VQAs) offer the most promising path to obtaining quantum advantages via noisy intermediate-scale quantum (NISQ) processors. Such systems leverage classical optimization to tune the parameters of a parameterized quantum circuit (PQC). The goal is minimizing a cost function that depends on measurement outputs obtained from the PQC. Optimization is typically implemented via stochastic gradient descent (SGD). On NISQ computers, gate noise due to imperfections and decoherence affects the stochastic gradient estimates by introducing a bias. Quantum error mitigation (QEM) techniques can reduce the estimation bias without requiring any increase in the number of qubits, but they in turn cause an increase in the variance of the gradient estimates. This work studies the impact of quantum gate noise on the convergence of SGD for the variational eigensolver (VQE), a fundamental instance of VQAs. The main goal is ascertaining conditions under which QEM can enhance the performance of SGD for VQEs. It is shown that quantum gate noise induces a nonzero error-floor on the convergence error of SGD (evaluated with respect to a reference noiseless PQC), which depends on the number of noisy gates, the strength of the noise, as well as the eigenspectrum of the observable being measured and minimized. In contrast, with QEM, any arbitrarily small error can be obtained. Furthermore, for error levels attainable with or without QEM, QEM can reduce the number of required iterations, but only as long as the quantum noise level is sufficiently large, and a sufficiently large number of measurements is allowed at each SGD iteration. Numerical examples for a max-cut problem corroborate the main theoretical findings.
In the past few years, the first commercially available quantum computers have emerged, in an early stage of development, the so-called Noisy Intermediate-Scale Quantum (NISQ) era. Although these devices are still very prone to errors of different natures, they also have shown to deal successfully with small computational problems. Nowadays, one of the challenges in quantum computation is exactly to be able to show that quantum computers are useful, whereby mitigating the effects of the faulty hardware is pivotal. Recently, a wide range of quantum error mitigation techniques have been proposed and successfully implemented, alternative to quantum error correction codes. Herein, we discuss several types of noise in a quantum computer and techniques available to mitigate them, as well as their limitations and conditions of applicability. We also suggest an hierarchy for them, towards the conception of a layered software framework of error mitigation techniques, and implement some of them in a quantum simulation of the Heisenberg model on an IBM quantum computer, improving the fidelity of the simulation by 2.8x.