Designing a qubit architecture is one of the most critical challenges in achieving scalable and fault-tolerant quantum computing as the performance of a quantum computer is heavily dependent on the coherence times, connectivity and low noise environments. Superconducting qubits have emerged as a frontrunner among many competing technologies, primarily because of their speed of operations, relatively well-developed and offer a promising path toward scalability. Here, we address the challenges of optimizing superconducting qubit hardware through the development of a comprehensive theoretical framework that spans the entire process - from design to the calibration of hardware through quantum gate execution. We develop this framework in four key steps: circuit design, electromagnetic analysis, spectral analysis, and pulse sequencing with calibration. We first refine the qubit's core components - such as capacitance, Josephson junctions, and resonators - to set the foundation for strong performance. The electromagnetic analysis, using the Lumped Oscillator model, allows us to map out the capacitance matrix, ensuring that we minimize spectral dispersion while maximizing coherence times. Following this, we conduct spectral analysis to fine-tune the qubit's frequency spectrum and coherence properties, ensuring that the qubit parameters are optimized. Finally, we focus on pulse sequencing, including pulse-width optimization, DRAG optimization, and randomized benchmarking, to achieve high gate fidelity. We applied this framework to both Transmon and Fluxonium qubits, obtaining results that closely match those found in experimental studies. This work provides a detailed and practical approach to the design, optimization, and calibration of superconducting qubits, contributing to the broader effort to develop scalable quantum computing technologies.
Designing a qubit architecture is one of the most critical challenges in achieving scalable and fault-tolerant quantum computing as the performance of a quantum computer is heavily dependent on the coherence times, connectivity and low noise environments. Superconducting qubits have emerged as a frontrunner among many competing technologies, primarily because of their speed of operations, relatively well-developed and offer a promising path toward scalability. Here, we address the challenges of optimizing superconducting qubit hardware through the development of a comprehensive theoretical framework that spans the entire process - from design to the calibration of hardware through quantum gate execution. We develop this framework in four key steps: circuit design, electromagnetic analysis, spectral analysis, and pulse sequencing with calibration. We first refine the qubit's core components - such as capacitance, Josephson junctions, and resonators - to set the foundation for strong performance. The electromagnetic analysis, using the Lumped Oscillator model, allows us to map out the capacitance matrix, ensuring that we minimize spectral dispersion while maximizing coherence times. Following this, we conduct spectral analysis to fine-tune the qubit's frequency spectrum and coherence properties, ensuring that the qubit parameters are optimized. Finally, we focus on pulse sequencing, including pulse-width optimization, DRAG optimization, and randomized benchmarking, to achieve high gate fidelity. We applied this framework to both Transmon and Fluxonium qubits, obtaining results that closely match those found in experimental studies. This work provides a detailed and practical approach to the design, optimization, and calibration of superconducting qubits, contributing to the broader effort to develop scalable quantum computing technologies.
Superconducting qubits are a leading platform for quantum computation, yet decoherence and scalability challenges continue to limit progress toward fault-tolerant systems. This review synthesizes research on architectures, noise sources, and error correction to clarify performance trade-offs and guide development. The transition from Transmon to Fluxonium has dramatically improved qubit performance, achieving millisecond-scale coherence times. However, this success reveals a fundamental limit of coherence now being primarily restricted by the physical properties of the materials, specifically dielectric losses occurring at the Josephson junction leads and within the surrounding materials. As overcoming these material limits becomes increasingly difficult, system-level engineering determines whether high-coherence qubits can scale.Scaling quantum systems is difficult because current cooling and control systems create too much heat and this forces a shift to integrated digital superconducting circuits and cryogenic light-based links. While these hardware challenges restrict scaling, experiments in error correction show that logical qubits can already outperform physical ones. For example, a distance-7 surface code improved logical qubit lifetime by 2.4×. Achieving practical fault tolerance, however, requires moving beyond simple error models. Future systems must combine techniques like Dynamical Decoupling and Machine Learning-based Optimal Control with dynamic classical control capable of handling complex, correlated faults such as Multi-Bit Burst Errors. Progress in materials, cryogenic system integration for control, and adaptive error management must advance together to realize scalable, high-fidelity quantum hardware.
Quantum computers utilize qubits to store and process quantum information. In superconducting quantum computers, qubits are implemented as quantum superconducting resonant circuits. The circuits are operated only at the two energy states, which form the computational basis for the qubit. To suppress leakage to uncomputational states, superconducting qubits are designed to be anharmonic oscillators, which is achieved using one or more Josephson junctions, a nonlinear superconducting element. One of the main challenges in developing quantum computers is minimizing the decoherence caused by environmental noise. Decoherence is characterized by two coherence times, T1 for depolarization processes and T2 for dephasing. This thesis reviews and investigates the decoherence properties of superconducting qubits. The main goal of the thesis is to analyze the tradeoff between anharmonicity and dephasing in a qubit unimon. Recently developed unimon incorporates a single Josephson junction shunted by a linear inductor and a capacitor. Unimon is tunable by external magnetic flux, and at the half flux quantum bias, the Josephson energy is partially canceled by the inductive energy, allowing unimon to have relatively high anharmonicity while remaining fully protected against low-frequency charge noise. In addition, at the sweet spot with respect to the magnetic flux, unimon becomes immune to first-order perturbations in the flux. The sweet spot, however, is relatively narrow, making unimon susceptible to dephasing through the quadratic coupling to the flux noise. In the first chapter of this thesis, we present a comprehensive look into the basic theory of superconducting qubits, starting with two-state quantum systems, followed by superconductivity and superconducting circuit elements, and finally combining these two by introducing circuit quantum electrodynamics (cQED), a framework for building superconducting qubits. We follow with a theoretical discussion of decoherence in two-state quantum systems, described by the Bloch-Redfield formalism. We continue the discussion by estimating decoherence using perturbation theory, with special care put into the dephasing due to the low-frequency 1/f noise. Finally, we review the theoretical model of unimon, which is used in the numerical analysis. As a main result of this thesis, we suggest a design parameter regime for unimon, which gives the best ratio between anharmonicity and T2.
This thesis explores novel strategies for advancing superconducting quantum computing through a series of experimental investigations and device innovations. Grounded in the development of circuit quantum electrodynamics, the work addresses the challenges posed by the limitations of coherent control, coherence time and scaling of superconducting qubits. Focusing on transmon qubits, the thesis first reviews the foundational principles of circuit quantum electrodynamics and the critical role of the transmon in achieving robust qubit performance. Three experimental studies form the core of this work. The first study demonstrates a universal quantum gate set for strongly coupled transmons. By exploiting the residual ZZ interaction, the work introduces a novel two-axis gate protocol for single-qubit operations and implements both CZ and CNOT gates with high fidelities, highlighting the potential for fast, low-error quantum operations in the strong coupling regime. The second study investigates a dual-rail qubit architecture using parametrically coupled transmons, showcasing a hardware-efficient approach to quantum error correction. This experiment converts single-photon loss errors into detectable erasures and leverages mid-circuit detection to enhance qubit coherence, thereby advancing fault-tolerant quantum computing schemes in the NISQ era. The final study focuses on the development of merged-element transmons (MET) and their FinMET variants. By integrating the Josephson junction and shunt capacitor into a single trilayer device, these innovations achieve a dramatic reduction in device footprint while addressing loss channels through advanced materials engineering, ultimately paving the way for scalable, high-coherence quantum circuits. Collectively, these contributions demonstrate significant progress in quantum gate design, error mitigation, and qubit architecture, offering promising routes toward the realization of largescale, fault-tolerant quantum computers
The discovery of quantum mechanics in the 20th century forms the basis of many of the technologies that define our lives today. The ability to engineer and manipulate individual quantum systems -- even create artificial atoms -- promises a similar revolutionary leap in technology. A quantum technology of particular interest is quantum computing, which has the potential to solve problems that are intractable for classical computers, opening up new domains of computation. Meanwhile, an attractive approach to creating engineered quantum systems is circuit quantum electrodynamics (cQED). Where research initially focused on understanding the physics of cQED devices, focus has shifted to building systems capable of performing useful computations. However, this remains extremely challenging, in part due to the inherently fragile nature of the individual quantum bits, but also due to difficulties in controlling and scaling up these systems. This thesis focuses on the control aspects of building an extensible full-stack quantum computer based on superconducting transmon qubits. We define the demonstration of quantum fault-tolerance as our target application to give focus to our efforts. The QuSurf architecture for a full-stack quantum computer presented in this thesis is designed with this application in mind. We provide a detailed study of the error sources present in this system and give an overview of the relevant characterization techniques. In the second part of this thesis, we address several key challenges in the control of a quantum computer. To realize high-fidelity coherence limited gates, we present a novel tuneup protocol that achieves a tenfold speedup over the state-of-the-art. This is realized by eliminating the need for qubit initialization. We demonstrate this protocol by calibrating single-qubit gates to a coherence limited Clifford fidelity of 99.9% in one minute. Performing repeated parity checks, as is required for quantum error correction, requires reusing qubits quickly after they have been measured. By introducing a numerically optimized depletion pulse we are able to speeds up the depletion of measurement photons in a readout resonator without having to rely on specific symmetry conditions. Using this technique speed up photon depletion by more than six inverse resonator linewidths, reducing the error rate in an emulated ancilla parity check by a factor 75. Flux-pulsing based two-qubit gates are the fastest two-qubit gates. However, they are also very technically demanding. The key challenge in performing these gates is addressing the distortions that control signals experience as they traverse various electrical components. We have developed Cryoscope (short for cryogenic oscilloscope) to characterize and correct these distortions. Cryoscope is an in-situ technique that uses the qubit to sample control pulses of arbitrary shape. Even when correcting distortions to within sim0.1 two-qubit gates are history-dependent due to the long timescale upon which some of these distortions act. We have invented Net-Zero, a new type of flux-pulsing based two-qubit gate, to address this problem. It makes use of a symmetry condition of the transmon to have net-zero integral, making the gate resilient to long-timescale distortions. The gate suppresses leakage out of the computational subspace to 0.1% by making use of leakage interference and has a built-in echo effect that enhances the coherence of the gate, achieving a two-qubit gate fidelity of 99.1%. Custom software is required to perform the physics experiments needed to build and operate a quantum computer. PycQED is an open-source software framework we have developed for this purpose. We discuss the design choices and concepts of PycQED before turning our focus to characterization and calibration. Here we introduced dependency graphs as a useful abstraction and system emulation as an essential development tool for automating the characterization and calibration process. We conclude the thesis by reflecting on the limitations of our architecture and providing an outlook on the grand challenges of building a useful kilo-qubit sized quantum computer. We define these challenges as The Application Problem, The Fabrication Problem, and The Calibration Problem.
Quantum computing is advancing rapidly, with superconducting quantum computing (SQC) emerging as one of the most promising platforms for scalable quantum information processing. In contrast to fabrication-focused approaches prevalent in current literature, this work presents a fully simulation-based design and tuning methodology for a small-scale superconducting quantum chip - addressing practical limitations posed by fabrication resource constraints - and consequently excludes physical chip fabrication or real-time performance evaluation (e.g., fidelity and error rate measurements). A meticulous, step-by-step electromagnetic simulation was conducted on the chip, designed using Qiskit Metal and Ansys Electronics, with qubit parameters tuned and verified using the Lumped Oscillator Model (LOM) and Energy Participation Ratio (EPR) methods. The design achieves good parameter convergence with relative tuning error rates (Δ%) below 0.05% after 15 adaptive passes and approximately 50,000 solved mesh elements, yielding an Energy Participation Ratio (EPR) of 91.8 % for the chip substrate (Silicon). Furthermore, the study includes a theoretical comparison between two fundamental qubit-qubit coupling schemes. A key contribution of this work lies in systematically analyzing how geometric variations in qubit design affect critical quantum parameters such as qubit frequencies, anharmonicities, coupling strengths, and dispersive shifts - thereby offering a comprehen-sive, simulation-driven framework for early-stage quantum chip prototyping.
This review aims to provide researchers, experimentalists, and quantum engineers with an updated and technically grounded perspective on the implementation of quantum gates in superconducting NISQ devices. The goal is to establish a comprehensive bridge between theoretical quantum circuit synthesis and its practical, experimental implementation, focusing on superconducting quantum technologies. We systematically examine the diverse landscape of superconducting qubits and processor architectures, ranging from conventional transmons to alternative and unconventional designs, evaluating their unique design trade-offs, connectivity constraints, device physics, and materials impact. Moving from theory to actual implementation, we detail how single- and two-qubit operations are synthesized via microwave-driven and flux-activated pulses. We here present our pulse engineering, wave shaping, calibration workflows, demonstrating how to bridge the gap between abstract gate models and real-world hardware limitations in the direction of a hardware-software co-design framework. To validate these operations, we choose benchmarking methodologies with the purpose to get the more efficient metric for the specific evaluation aspect, including truth tables and quantum process tomography. Therefore, we both discuss the theoretical concepts behind the gate synthesis and show experimental implementation of most fundamental gates by proposing a practical workflow.