Quantum Gate Engineering in Superconducting NISQ Platforms: Experimental Methods and Emerging Directions
Alessandro Sarno, Viviana Stasino, Antonio Pio Italiano, Alessandra Pizza, Carlo Cosenza, Wladislav Guarino, Domenico Montemurro, Francesco Tafuri, Davide Massarotti, Halima Giovanna Ahmad
quant-phcond-mat.supr-conSubmitted Oct 28, 2026• Announced Oct 29, 2026• 0 citations
This review aims to provide researchers, experimentalists, and quantum engineers with an updated and technically grounded perspective on the implementation of quantum gates in superconducting NISQ devices. The goal is to establish a comprehensive bridge between theoretical quantum circuit synthesis and its practical, experimental implementation, focusing on superconducting quantum technologies. We systematically examine the diverse landscape of superconducting qubits and processor architectures, ranging from conventional transmons to alternative and unconventional designs, evaluating their unique design trade-offs, connectivity constraints, device physics, and materials impact. Moving from theory to actual implementation, we detail how single- and two-qubit operations are synthesized via microwave-driven and flux-activated pulses. We here present our pulse engineering, wave shaping, calibration workflows, demonstrating how to bridge the gap between abstract gate models and real-world hardware limitations in the direction of a hardware-software co-design framework. To validate these operations, we choose benchmarking methodologies with the purpose to get the more efficient metric for the specific evaluation aspect, including truth tables and quantum process tomography. Therefore, we both discuss the theoretical concepts behind the gate synthesis and show experimental implementation of most fundamental gates by proposing a practical workflow.
AI Summary
This review addresses how abstract quantum gates are translated into calibrated pulse sequences on superconducting processors, and how gate characterization relates to computational performance. It surveys qubit designs, coupling architectures, hardware-aware compilation, microwave single-qubit control, and flux-activated entangling gates, with particular attention to DRAG calibration and net-zero/sudden-net-zero CZ pulses.
Experimental examples use two- and three-qubit registers of a 21-qubit flux-tunable transmon processor with fixed bus-resonator coupling. Calibration combines Ramsey, amplitude-error amplification, Motzoi and AllXY protocols for single-qubit gates, and conditional-oscillation measurements for CZ phase and leakage adjustment. Quantum process tomography reconstructs Pauli transfer matrices, yielding reported average gate fidelities of $99.2\pm0.2\%$ for Hadamard, approximately $99.9\%$ for virtual S and T gates, $94.1\pm0.5\%$ for CZ, $91.1\pm0.05\%$ for CNOT, and $90.2\pm0.05\%$ for a three-CNOT SWAP. Computational-basis truth tables give Hellinger fidelities of $82.8\pm0.7\%$ for a decomposed Toffoli and $86.8\pm0.7\%$ for GHZ-state output distributions. One CNOT example improves from $76.1\%$ to $89.4\%$ after a virtual-Z phase correction.
The review distinguishes population-based truth-table agreement from full process characterization. It states that average fidelities can obscure coherent accumulation, leakage, drift and context-dependent errors, while full process tomography requires $\mathcal{O}(16^n)$ parameters and is sensitive to preparation and measurement errors. Architecture-dependent calibration workflows limit generalization; flux-induced dephasing and readout errors remain limitations of the demonstrated gates.
Some signs of AI-generated textOverclaimsUnclear noveltyMissing comparisonPossible error
Error found: The Bell and GHZ computational-basis truth tables cannot certify entanglement, because separable incoherent mixtures reproduce exactly the same ideal populations.
The paper incorrectly lists G1={CNOT,H,S} as universal, although it generates only Clifford operations.
The paper incorrectly lists G0={Toffoli,CNOT,T} as universal, although these gates cannot generate superpositions from computational-basis inputs.
The claimed equivalence between controlled-RY(π) and (I⊗S)CNOT(I⊗S†) omits a necessary S correction on the control qubit.
Written by gpt-6.1-sol from the paper's full text. Automated: it can be wrong.
This review aims to provide researchers, experimentalists, and quantum engineers with an updated and technically grounded perspective on the implementation of quantum gates in superconducting NISQ devices. The goal is to establish a comprehensive bridge between theoretical quantum circuit synthesis and its practical, experimental implementation, focusing on superconducting quantum technologies. We systematically examine the diverse landscape of superconducting qubits and processor architectures, ranging from conventional transmons to alternative and unconventional designs, evaluating their unique design trade-offs, connectivity constraints, device physics, and materials impact. Moving from theory to actual implementation, we detail how single- and two-qubit operations are synthesized via microwave-driven and flux-activated pulses. We here present our pulse engineering, wave shaping, calibration workflows, demonstrating how to bridge the gap between abstract gate models and real-world hardware limitations in the direction of a hardware-software co-design framework. To validate these operations, we choose benchmarking methodologies with the purpose to get the more efficient metric for the specific evaluation aspect, including truth tables and quantum process tomography. Therefore, we both discuss the theoretical concepts behind the gate synthesis and show experimental implementation of most fundamental gates by proposing a practical workflow.
This review addresses how abstract quantum gates are translated into calibrated pulse sequences on superconducting processors, and how gate characterization relates to computational performance. It surveys qubit designs, coupling architectures, hardware-aware compilation, microwave single-qubit control, and flux-activated entangling gates, with particular attention to DRAG calibration and net-zero/sudden-net-zero CZ pulses.
Experimental examples use two- and three-qubit registers of a 21-qubit flux-tunable transmon processor with fixed bus-resonator coupling. Calibration combines Ramsey, amplitude-error amplification, Motzoi and AllXY protocols for single-qubit gates, and conditional-oscillation measurements for CZ phase and leakage adjustment. Quantum process tomography reconstructs Pauli transfer matrices, yielding reported average gate fidelities of 99.2±0.2% for Hadamard, approximately 99.9% for virtual S and T gates, 94.1±0.5% for CZ, 91.1±0.05% for CNOT, and 90.2±0.05% for a three-CNOT SWAP. Computational-basis truth tables give Hellinger fidelities of 82.8±0.7% for a decomposed Toffoli and 86.8±0.7% for GHZ-state output distributions. One CNOT example improves from 76.1% to 89.4% after a virtual-Z phase correction.
The review distinguishes population-based truth-table agreement from full process characterization. It states that average fidelities can obscure coherent accumulation, leakage, drift and context-dependent errors, while full process tomography requires O(16n) parameters and is sensitive to preparation and measurement errors. Architecture-dependent calibration workflows limit generalization; flux-induced dephasing and readout errors remain limitations of the demonstrated gates.
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