Quantum low-density parity-check (qLDPC) codes with high-performance and nonlocal stabilizers are an attractive alternative to the surface code because of their relatively high code rate and distance. However, unlike the surface code that has simple, geometrically local, stabilizer checks, qLDPC codes with nonlocal stabilizers are challenging to measure. Recent advances have shown how to deterministically perform high-fidelity, cavity-mediated many-body gates, enabling the encoding and decoding of nonlocal GHZ states. We show how to use this resource for constant-depth fault-tolerant stabilizer measurements in hypergraph product and lifted product codes. Using circuit-level noise simulations, including leakage and collective error from the noise-optimized cavity-mediated gate, we find promising thresholds of 0.84 % – 0.60 % for the hypergraph product code and pseudothreshold of 0.3 % – 0.4 % for the lifted product codes, with cavity cooperativities in the range C ∼ 10 4 – 10 6 . We propose a trilayer architecture, compatible with neutral atom platforms, which enhances circuit parallelizability.
Quantum low-density parity-check (qLDPC) codes with high-performance and nonlocal stabilizers are an attractive alternative to the surface code because of their relatively high code rate and distance. However, unlike the surface code that has simple, geometrically local, stabilizer checks, qLDPC codes with nonlocal stabilizers are challenging to measure. Recent advances have shown how to deterministically perform high-fidelity, cavity-mediated many-body gates, enabling the encoding and decoding of nonlocal GHZ states. We show how to use this resource for constant-depth fault-tolerant stabilizer measurements in hypergraph product and lifted product codes. Using circuit-level noise simulations, including leakage and collective error from the noise-optimized cavity-mediated gate, we find promising thresholds of 0.84 % – 0.60 % for the hypergraph product code and pseudothreshold of 0.3 % – 0.4 % for the lifted product codes, with cavity cooperativities in the range C ∼ 10 4 – 10 6 . We propose a trilayer architecture, compatible with neutral atom platforms, which enhances circuit parallelizability.
Unlike the surface code, quantum low-density parity-check (QLDPC) codes can have a finite encoding rate, potentially lowering the error correction overhead. However, finite-rate QLDPC codes have nonlocal stabilizers, making it difficult to design stabilizer measurement circuits that are low-depth and do not decrease the effective distance. Here, we demonstrate that a popular family of finite-rate QLDPC codes, hypergraph product codes, has the convenient property of distance-robustness: any stabilizer measurement circuit preserves the effective distance. In particular, we prove the depth-optimal circuit in [Tremblay et al, PRL 129, 050504 (2022)] is also optimal in terms of effective distance.
Logical entangling gates are a major source of physical spacetime overhead in fault-tolerant quantum computation. Phantom codes reduce this cost by implementing every ordered in-block logical CNOT through physical qubit permutations and Pauli-frame updates. Whether this mechanism can coexist with the low-weight stabilizer structure of qLDPC codes is a central question for low-overhead fault-tolerant architectures. We give a deterministic answer within binary CSS hypergraph product (HGP) codes. Up to natural equivalences, the simplex-repetition family is the unique HGP family satisfying the phantom condition. We then evaluate this family under circuit-level noise in logical GHZ-state preparation and Trotterized many-body quantum simulation. The codes retain low-weight stabilizer checks and yield concrete advantages over rotated surface-code baselines in both benchmarks. Reconfigurable neutral-atom arrays offer a natural setting for this approach, supporting nonlocal qLDPC operations while enabling in-block logical CNOTs without additional physical operations. Together, these results make precise how permutation-based logical entangling constrains code design within the HGP framework, demonstrate the circuit-level benefits of the unique family, and guide the search for phantom qLDPC families with better asymptotic parameters for low-overhead fault tolerance on neutral-atom hardware.
Quantum low density parity check (qLDPC) codes, particularly bivariate bicycle (BB) codes, achieve competitive fault tolerance thresholds while offering substantially higher encoding rates than planar surface codes. However, their intrinsically long-range stabilizer structure makes them difficult to implement on monolithic devices with nearest neighbor connectivity and limited qubit capacity. In this work, we study the realization of a BB code in a modular multiprocessor architecture, where quantum processors are interconnected through shared Bell pairs. We consider processors with all to all internal connectivity, which is feasible on trapped ion and neutral atom platforms, enabling flexible local gate execution while inter-processor (nonlocal) gates are mediated by shared entanglement. We describe a star network architecture that can realize this distributed setting. We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting. Our results provide architectural insight and design considerations for distributed BB codes in modular quantum computing architectures.
Quantum low-density parity-check (QLDPC) codes are an important class of quantum error-correcting codes that have low-weight stabilizer generators and typically offer encoding rates much higher than popular topological quantum codes such as surface and toric codes. While recent constructions of QLDPC codes have been aimed at two-level quantum systems, several hardware platforms for quantum computing, including superconducting and photonic systems, support a much larger Hilbert space. This makes the design of qudit-based quantum LDPC codes an issue of paramount significance in harnessing the increased flexibility afforded by high -dimensional quantum systems. In this paper, we forge the first steps in addressing this gap and explore the generalization of QLDPC constructions to qudit systems. We review two methods of generalizing binary quantum codes to qudit codes, namely, the stack and merge constructions, and investigate the application of these two meth-ods to the well-known hypergraph product and lifted-product codes. Subsequently, we provide upper and lower bounds for the encoding rates of the resulting qudit codes. We also prove an interesting relationship between the qudit hypergraph product and qudit lifted-product codes: the merge construction applied to the lifted product code is equivalent to the stack construction applied to the hypergraph product code under certain conditions. We evaluate the performance of these qudit codes under non-binary belief-propagation decoding and observe that qudit codes offer us a greater degree of flexibility in optimizing their rate-performance trade-off. We also demonstrate that, under certain conditions, qudit codes can simultaneously achieve higher rates and higher frame error rate (FER) performance than their binary counterparts.
Quantum low-density parity-check (QLDPC) codes with good parameters are promising candidates for low-overhead fault-tolerant quantum computing, but their non-local stabilizers require long-range connectivity and frequent qubit movement, introducing practical challenges. Prior work has studied the networked implementation of topological codes, where each node only holds one or a few qubits of the entire code, and demonstrated competitive performance under practical constraints such as the quality of network-provided entanglement. However, since these codes are already geometrically local, such a networked setting might not be essential. In this work, we propose and study the networked implementation of better QLDPC codes, specifically bivariate bicycle codes due to their similarity to surface codes and the controlled amount of long-range connections in their stabilizers. We begin by recreating networked surface codes in Stim, with one code qubit per node, and provide additional insights into their circuit-level noise performance. We then extend this approach to bipartitions of bivariate bicycle codes, using balanced min-cut partitioning on their combined X-Z Tanner graph to identify optimal qubit splits. For stabilizers spanning nodes, we implement teleported CNOTs and vary the Bell pair fidelity enabling these gates. Through circuit-level noise simulations with BP-OSD decoding, we provide the first insights into networked realizations of these codes and compare their performance with monolithic implementations. We conclude by outlining advantages, limitations, and future directions.
Quantum low-density parity check (qLDPC) codes are among the leading candidates to realize error-corrected quantum memories with low qubit overhead. Potentially high encoding rates and large distance relative to their block size make them appealing for practical suppression of noise in near-term quantum computers. In addition to increased qubit-connectivity requirements compared to more conventional topological quantum error correcting codes, qLDPC codes remain notoriously hard to compute with. In this work, we introduce a construction to implement all Clifford quantum gate operations on the recently introduced lift-connected surface (LCS) codes (Old et al. 2024). These codes can be implemented in a 3D-local architecture and achieve asymptotic scaling [[n,O(n1/3),O(n1/3)]]. In particular, LCS codes realize favorable instances with small numbers of qubits: For the [[15,3,3]] LCS code, we provide deterministic fault-tolerant (FT) circuits of the logical gate set {Hi,Hi,CiXj}i,j∈(0,1,2) based on flag qubits. By adding a procedure for FT magic state preparation, we show quantitatively how to realize an FT universal gate set in d=3 LCS codes. Numerical simulations indicate that our gate constructions can attain pseudothresholds in the range pth≈4.8⋅10−3−1.2⋅10−2 for circuit-level noise. The schemes use a moderate number of qubits and are therefore feasible for near-term experiments, facilitating progress for fault-tolerant error corrected logic in high-rate qLPDC codes.