Logical entangling gates are a major source of physical spacetime overhead in fault-tolerant quantum computation. Phantom codes reduce this cost by implementing every ordered in-block logical CNOT through physical qubit permutations and Pauli-frame updates. Whether this mechanism can coexist with the low-weight stabilizer structure of qLDPC codes is a central question for low-overhead fault-tolerant architectures. We give a deterministic answer within binary CSS hypergraph product (HGP) codes. Up to natural equivalences, the simplex-repetition family is the unique HGP family satisfying the phantom condition. We then evaluate this family under circuit-level noise in logical GHZ-state preparation and Trotterized many-body quantum simulation. The codes retain low-weight stabilizer checks and yield concrete advantages over rotated surface-code baselines in both benchmarks. Reconfigurable neutral-atom arrays offer a natural setting for this approach, supporting nonlocal qLDPC operations while enabling in-block logical CNOTs without additional physical operations. Together, these results make precise how permutation-based logical entangling constrains code design within the HGP framework, demonstrate the circuit-level benefits of the unique family, and guide the search for phantom qLDPC families with better asymptotic parameters for low-overhead fault tolerance on neutral-atom hardware.
Logical entangling gates are a major source of physical spacetime overhead in fault-tolerant quantum computation. Phantom codes reduce this cost by implementing every ordered in-block logical CNOT through physical qubit permutations and Pauli-frame updates. Whether this mechanism can coexist with the low-weight stabilizer structure of qLDPC codes is a central question for low-overhead fault-tolerant architectures. We give a deterministic answer within binary CSS hypergraph product (HGP) codes. Up to natural equivalences, the simplex-repetition family is the unique HGP family satisfying the phantom condition. We then evaluate this family under circuit-level noise in logical GHZ-state preparation and Trotterized many-body quantum simulation. The codes retain low-weight stabilizer checks and yield concrete advantages over rotated surface-code baselines in both benchmarks. Reconfigurable neutral-atom arrays offer a natural setting for this approach, supporting nonlocal qLDPC operations while enabling in-block logical CNOTs without additional physical operations. Together, these results make precise how permutation-based logical entangling constrains code design within the HGP framework, demonstrate the circuit-level benefits of the unique family, and guide the search for phantom qLDPC families with better asymptotic parameters for low-overhead fault tolerance on neutral-atom hardware.
Quantum low-density parity-check (QLDPC) codes are promising candidates for practical low-overhead quantum memories. For large-scale fault-tolerant quantum computation, we further need logical processing methods for QLDPC codes. In this work, we construct full extractors---surgery systems capable of measuring arbitrary logical Pauli operators on a code block---for several hypergraph product (HGP) codes. These extractors enable logical processing via Pauli-based computation (PBC) without the compilation overhead observed in prior works. Moreover, our extractors have sizes between 47% and 80% of the base HGP codes, and the extractor-augmented codes can be supported on fixed-connectivity hardware with maximum qubit degree ten. Our approach involves assembling many partial extractors with verifiable fault tolerance into a single full extractor. For a distance 10 HGP code, circuit-level noise simulations yield logical measurement error rates of approximately 10−6 at a physical error rate of 0.1%. These results demonstrate that extractor architectures, when designed in the fixed-connectivity setting, can achieve the space efficiency of QLDPC codes without introducing compilation overhead compared to surface-code PBC architectures.
Quantum low-density parity-check (qLDPC) codes with high-performance and nonlocal stabilizers are an attractive alternative to the surface code because of their relatively high code rate and distance. However, unlike the surface code that has simple, geometrically local, stabilizer checks, qLDPC codes with nonlocal stabilizers are challenging to measure. Recent advances have shown how to deterministically perform high-fidelity, cavity-mediated many-body gates, enabling the encoding and decoding of nonlocal GHZ states. We show how to use this resource for constant-depth fault-tolerant stabilizer measurements in hypergraph product and lifted product codes. Using circuit-level noise simulations, including leakage and collective error from the noise-optimized cavity-mediated gate, we find promising thresholds of 0.84 % – 0.60 % for the hypergraph product code and pseudothreshold of 0.3 % – 0.4 % for the lifted product codes, with cavity cooperativities in the range C ∼ 10 4 – 10 6 . We propose a trilayer architecture, compatible with neutral atom platforms, which enhances circuit parallelizability.
Fault-tolerant logical entangling gates are essential for scalable quantum computing, but are limited by the error rates and overheads of physical two-qubit gates and measurements. To address this limitation, we introduce phantom codes-quantum error-correcting codes that realize entangling gates between all logical qubits in a code block purely through relabelling of physical qubits during compilation, yielding perfect fidelity with no spatial or temporal overhead. We present a systematic study of such codes. First, we identify phantom codes using complementary numerical and analytical approaches. We exhaustively enumerate all 2.71×1010 inequivalent CSS codes up to n=14 and identify additional instances up to n=21 via SAT-based methods. We then construct higher-distance phantom-code families using quantum Reed-Muller codes and the binarization of qudit codes. Across all identified codes, we characterize other supported fault-tolerant logical Clifford and non-Clifford operations. Second, through end-to-end noisy simulations with state preparation, full QEC cycles, and realistic physical error rates, we demonstrate scalable advantages of phantom codes over the surface code across multiple tasks. We observe a one-to-two order-of-magnitude reduction in logical infidelity at comparable qubit overhead for GHZ-state preparation and Trotterized many-body simulation tasks, given a modest preselection acceptance rate. Our work establishes phantom codes as a viable architectural route to fault-tolerant quantum computation with scalable benefits for workloads with dense local entangling structure, and introduces general tools for systematically exploring the broader landscape of quantum error-correcting codes.
An [[n,k,d]] stabilizer code is phantom if every in-block logical CNOT gate can be realized by a permutation of its physical qubits. This eliminates the large and complicated physical overhead normally required for logical entangling gates. Yet this symmetry is highly restrictive: phantom codes are rare, the number of logical qubits is limited to k=O(logn), and no phantom qLDPC family with growing logical dimension was previously known.
We make three contributions.
1. We prove that recognizing phantomness of a given stabilizer code is at least as hard as Graph Isomorphism, even for CSS codes encoding only k=2 logical qubits.
2. We propose the first rate optimal phantom qLDPC families: for every fixed D, our CSS families achieve the maximal logical scaling k=Θ(logn) and distance d≥D.
3. We prove a distance no-go theorem: every phantom code family with k=ω(logn) and check weight w=O(1) satisfies d≤w for sufficiently large n.
Thus our fixed-distance qLDPC families are distance-scaling optimal at the maximal logical scaling k=Θ(logn).
High-rate quantum low-density parity-check (qLDPC) codes encode many logical qubits with low physical-qubit overhead, but realizing efficient fault-tolerant computation on such dense encodings remains a major challenge. Generic, code-agnostic techniques such as code surgery and gate teleportation apply broadly, but are difficult to make modular, low-overhead, and fully certifiable on complex high-rate codes whose structure is left unexploited. Here we overcome these obstacles by co-designing the code together with its logical instruction set for a broad family of canonical lifted-product (LP) codes with cyclic symmetry. We show that these codes admit a canonical logical basis, in which conjugate logical operators are organized into rows and columns of cyclic orbits inherited directly from the underlying classical codes, analogous to the structure that makes hypergraph-product codes so tractable. This canonical basis enables universal logical processing using magic-state input and a constant number of reusable seed surgery gadgets---only two (resp. four) for a [[1122,148,≤20]] (resp. [[4350,1224,≤20]]) LP code. A fixed extractor smaller than half the data block also enables arbitrarily high-weight logical Pauli-product measurements (PPMs) while preserving the code's cyclic symmetry. These codes also enable rigorously fault-tolerant parallel logic, including PPMs across all logical qubits and magic-state injection from many surface codes into a full LP block. For example, a [[468,36,20]] (resp. [[952,112,17]]) code supports simultaneous measurements of arbitrary logically disjoint Pauli products with an ancilla overhead of roughly three (resp. four) times the data block size. These results advance the frontier of fault-tolerant quantum computation on ultra-high-rate quantum architectures.
We design low-complexity, fault-tolerant decoders for quantum low-density parity-check (QLDPC) codes with the goal of reducing decoding latency. We target two major bottlenecks of decoding under the \emph{circuit-level} noise model: (i) post-processing via order-statistics decoding (OSD), and (ii) the large number of auxiliary variable nodes commonly introduced to represent CNOT-induced correlations during syndrome extraction. Our key observation is that propagating CNOT faults (\emph{hook errors}) create \emph{stabilizer-induced} trapping sets (TSs) that are intrinsic to hypergraph-product (HGP) and lifted-product (LP) constructions. Therefore, instead of modeling each such fault with an explicit correlation node and relying on OSD to clean up the resulting failures, we design message-passing decoders that resolve the corresponding \emph{stabilizer-induced} TSs directly. We obtain these decoders by deriving QLDPC decoders from decoders for the parent classical LDPC codes and using them collectively to correct broad families of \emph{stabilizer-induced} TSs. For CNOT faults that manifest primarily as syndrome errors, we show that their effect is equivalent to a data error together with syndrome-bit measurement errors. Consequently, given repeated measurements and a decoding graph that already includes nodes representing syndrome-bit errors, no distinct variable node is needed for each CNOT fault. Using a \emph{phenomenological} Tanner graph with nodes representing only data errors and syndrome-bit errors, simulations on LP codes show a significant improvement in logical error rate relative to BP+OSD. Moreover, the improved error correction relies on low-complexity finite-state iterative decoders, targeted for fast and low-latency FPGA implementation.