Reducing the energy inefficiency of conventional CMOS-based computing devices-which rely on logically irreversible gates to process information-remains both a fundamental engineering challenge and a practical social challenge of increasing importance. We extend an alternative computing paradigm that manipulates microstate distributions to store information in the metastable minima determined by an effective potential energy landscape. These minima serve as mesoscopic memories that are manipulated by a dynamic landscape to perform information processing. Central to our results is the control erase protocol, which controls the landscape's metastable minima to determine whether information is preserved or erased. Importantly, successive protocol executions can implement a NAND gate-a logically irreversible universal logic gate. We show how to practically implement CEs in a device created by two inductively coupled superconducting quantum interference devices (SQUIDs). We identify circuit parameter ranges that give rise to effective CEs and establish the device's robustness against thermally induced errors. These SQUID-based logical devices are capable of operating above GHz frequencies and at the kBT energy scale. Due to this, optimized devices and associated protocols provide a universal-computation substrate that is both computationally fast and energy efficient.
Reducing the energy inefficiency of conventional CMOS-based computing devices-which rely on logically irreversible gates to process information-remains both a fundamental engineering challenge and a practical social challenge of increasing importance. We extend an alternative computing paradigm that manipulates microstate distributions to store information in the metastable minima determined by an effective potential energy landscape. These minima serve as mesoscopic memories that are manipulated by a dynamic landscape to perform information processing. Central to our results is the control erase protocol, which controls the landscape's metastable minima to determine whether information is preserved or erased. Importantly, successive protocol executions can implement a NAND gate-a logically irreversible universal logic gate. We show how to practically implement CEs in a device created by two inductively coupled superconducting quantum interference devices (SQUIDs). We identify circuit parameter ranges that give rise to effective CEs and establish the device's robustness against thermally induced errors. These SQUID-based logical devices are capable of operating above GHz frequencies and at the kBT energy scale. Due to this, optimized devices and associated protocols provide a universal-computation substrate that is both computationally fast and energy efficient.
Alternative computing paradigms open the door to exploiting recent innovations in computational hardware to probe the fundamental thermodynamic limits of information processing. One such paradigm employs superconducting quantum interference devices (SQUIDs) to execute classical computations. This, though, requires constructing sufficiently complex superconducting circuits that support a suite of useful information processing tasks and storage operations, as well as understanding these circuits' energetics. First-principles circuit design leads to prohibitive algebraic complications when deriving the effective equations of motion—complications that to date have precluded achieving these goals, let alone doing so efficiently. We circumvent these complications by (i) specializing our class of circuits and physical operating regimes, (ii) synthesizing existing derivation techniques to suit these specializations, and (iii) implementing solution-finding optimizations which facilitate physically interpreting circuit degrees of freedom that respect physically grounded constraints. This leads to efficient and practical circuit prototyping, as well as accessing scalable circuit architectures. The analytical efficiency is demonstrated by reproducing the potential energy landscape generated by a SQUID. We then show how inductively coupling two SQUIDs produces a device that is capable of executing two-bit computations via its composite potential energy landscape. More generally, the synthesized methods detailed here provide a basis for constructing universal logic gates and investigating their thermodynamic performance.
Abstract We present implementations of two physically-embedded computation-universal logical operations using a 2-bit logical unit composed of coupled quantum flux parametrons—Josephson-junction superconducting circuits. To illustrate universality, we investigate NAND gates built from these two distinct elementary operations. On the one hand, Controlled Erasure (CE) is designed using fixed-point analysis and assumes that information must be stored in locally metastable distributions. On the other, Erasure-Flip (EF) leverages momentum as a computational resource and significantly outperforms the metastable approach, simultaneously achieving higher fidelity and faster computational speed without incurring any additional energetic cost. Notably, the momentum degree of freedom allows the EF to achieve universality by using both nontrivial reversible and irreversible logic simultaneously in different logical subspaces. These results not only provide a practical, high-performance protocol ripe for experimental realization but also underscore the broader potential of momentum-based computing paradigms.
The physical nature of computation imposes fundamental limits on the energy efficiency of information processing, as formalized by Landauer's principle, which establishes a minimum thermodynamic cost for information erasure. This dissertation investigates near-Landauer-limit computation using superconducting Quantum Flux Parametrons (QFPs). We first establish the theoretical foundations of physical computation, including logical and thermodynamic reversibility, stochastic thermodynamics, and the relationship between information, entropy, and energy dissipation. Building upon these principles, we develop and analyze computational protocols based on QFPs and Coupled QFPs (CQFPs). Numerical simulations demonstrate thermodynamically efficient bit erasure, bit-flip operations, and a superconducting realization of the Szilard Engine. We further demonstrate universal combinational logic through a NAND gate, as well as signal fan-out through a copier gate and memory through a D-latch, providing the essential primitives required for scalable digital computation. A central result of this work is the demonstration that momentum, conventionally regarded as a source of error in superconducting logic, can instead be exploited as a computational resource. By operating QFP circuits in the underdamped regime, momentum-assisted protocols achieve simultaneous improvements in speed, fidelity, and energy efficiency. These results establish QFP-based superconducting circuits as a promising platform for near-Landauer-limit computation and provide a foundation for future momentum-assisted superconducting dynamical computing architectures.
Rising energy demand from data-center and AI applications has renewed interest in reversible computation, where logic need not dissipate heat at every step if information is uncomputed. Implementations have so far been classical: adiabatic CMOS recovers part of the switching energy but still moves thousands of kBT per logic node at room temperature. Here we propose classical reversible logic implemented by coherent spin dynamics in a spin quantum-dot array, with inputs and outputs in classical basis states and no algorithmic use of superposition. The same spin stores, transports, and computes, with unitary rotation replacing irreversible switching. The universal building block is an iToffoli gate driven by DC voltage pulses and exchange between hole spins in Ge/SiGe quantum dots. Simulations with realistic model parameters reproduce the Toffoli truth table and yield a testable error landscape. Because shuttling transports the bit without measurement, logic and data movement remain unitary until readout. Millivolt pulses on femtofarad gates with superconducting lines dissipate only dielectric loss and have no thermodynamic floor. With the loss parameters assumed for a demonstrated device the gate energy is ∼102kBTln2 at 4 K; at a design point within reach of existing devices it can fall below the Landauer scale kBTln2, five to seven orders of magnitude less than a CMOS Toffoli. The same semiconductor hardware therefore serves both purposes, supporting quantum algorithms when superposition is used and classical reversible logic otherwise.
Superconductor electronics holds records for clock frequency and energy efficiency at the chip level, and is also projected to large systems that can absorb the cooling overhead. These advantages have nevertheless only managed to give this technology a back seat to CMOS digital circuits, which offer orders of magnitude more complexity. Furthermore, pursuing the CMOS paradigm with superconductor circuits would bring their clock frequency down to that of CMOS circuits. This makes superconductor technology much more open to risky innovations and even for paradigm changes. In the paper we point out that both (speed and energy efficiency) advantages of superconductor electronics could be preserved due to a unique composition of memory and logic functions of RSFQ cells. We propose to reorganize the original RSFQ cells into a new family of Memory And loGIC (MAGIC) gate/register objects that run arithmetic calculations as well as store results. The new MAGIC objects eliminate the time and energy overheads associated with the conventional transfer of computed data to memory by essentially reducing the transfer distance to zero. The new objects could serve as building blocks for distributed MAGIC-compatible architectures, differing from CMOS-like register files by processing as well as storing data. A simple Logic Unit (LU) would be sufficient to control the MAGIC registers, because the registers would provide most of the arithmetic functions and separate ALUs would not be needed. The reduction of the data exchange between logic and memory units leads to additional energy saving. Factorization of large integers is presented as an example illustrating the speed and density advantages of the new approach. The end result will be a superior technology which offers a combination of performance and energy efficiency unattainable by existing technologies or their possible extensions.
Prior to early this century, the semiconductor microprocessor can be scaled according to the Moore's law, basically doubling its performance in every 18 months. Only recently, the energy efficiency of semiconductor integrated circuits has become a concern than their computational capabilities since their power dissipation scales nonlinear with clock frequency. The specific energy dissipation per logic operation for a modern semiconductor computer is still over 6 orders of magnitude above the thermodynamic threshold kBTln2. It has been known for a long time that this thermodynamic limit on the energy dissipation per logic operation can be overcome by physically and logically reversible circuits. Reversible circuits based on nSQUIDs (negative SQUIDs) or dc SQUIDs (superconducting quantum interference device) with negative mutual inductance between the arms of the SQUID loop, are introduced and investigated in this thesis. First test reversible circuit contains one 8-stage shift register, cells that transfer the input data to the outputs. Dynamic of this circuit illustrates unique properties which agree well with theoretical analysis. Based on the knowledge from the study of shift register, a new timing belt clocking scheme built upon the moving vortices along long Josephson junction (LJJ) is introduced and analyzed. The test circuits for this new scheme contain two 8-stage shift registers, one with direct and the other with inverted outputs. The energy dissipation per nSQUID gate per bit measured for these test circuits at 4 K temperature is already below the thermodynamic threshold. A family of logical gates based on the new timing belt and nSQUIDs shift register are continued to be developed and these gates are capable of fundamentally low energy dissipation and the ability to operate in both irreversible and reversible modes. Moreover, the extremely low energy dissipation in these circuits makes them a natural candidate to support circuitry working in quantum mode with unique advantages.