Abstract We present implementations of two physically-embedded computation-universal logical operations using a 2-bit logical unit composed of coupled quantum flux parametrons—Josephson-junction superconducting circuits. To illustrate universality, we investigate NAND gates built from these two distinct elementary operations. On the one hand, Controlled Erasure (CE) is designed using fixed-point analysis and assumes that information must be stored in locally metastable distributions. On the other, Erasure-Flip (EF) leverages momentum as a computational resource and significantly outperforms the metastable approach, simultaneously achieving higher fidelity and faster computational speed without incurring any additional energetic cost. Notably, the momentum degree of freedom allows the EF to achieve universality by using both nontrivial reversible and irreversible logic simultaneously in different logical subspaces. These results not only provide a practical, high-performance protocol ripe for experimental realization but also underscore the broader potential of momentum-based computing paradigms.
Abstract We present implementations of two physically-embedded computation-universal logical operations using a 2-bit logical unit composed of coupled quantum flux parametrons—Josephson-junction superconducting circuits. To illustrate universality, we investigate NAND gates built from these two distinct elementary operations. On the one hand, Controlled Erasure (CE) is designed using fixed-point analysis and assumes that information must be stored in locally metastable distributions. On the other, Erasure-Flip (EF) leverages momentum as a computational resource and significantly outperforms the metastable approach, simultaneously achieving higher fidelity and faster computational speed without incurring any additional energetic cost. Notably, the momentum degree of freedom allows the EF to achieve universality by using both nontrivial reversible and irreversible logic simultaneously in different logical subspaces. These results not only provide a practical, high-performance protocol ripe for experimental realization but also underscore the broader potential of momentum-based computing paradigms.
The physical nature of computation imposes fundamental limits on the energy efficiency of information processing, as formalized by Landauer's principle, which establishes a minimum thermodynamic cost for information erasure. This dissertation investigates near-Landauer-limit computation using superconducting Quantum Flux Parametrons (QFPs). We first establish the theoretical foundations of physical computation, including logical and thermodynamic reversibility, stochastic thermodynamics, and the relationship between information, entropy, and energy dissipation. Building upon these principles, we develop and analyze computational protocols based on QFPs and Coupled QFPs (CQFPs). Numerical simulations demonstrate thermodynamically efficient bit erasure, bit-flip operations, and a superconducting realization of the Szilard Engine. We further demonstrate universal combinational logic through a NAND gate, as well as signal fan-out through a copier gate and memory through a D-latch, providing the essential primitives required for scalable digital computation. A central result of this work is the demonstration that momentum, conventionally regarded as a source of error in superconducting logic, can instead be exploited as a computational resource. By operating QFP circuits in the underdamped regime, momentum-assisted protocols achieve simultaneous improvements in speed, fidelity, and energy efficiency. These results establish QFP-based superconducting circuits as a promising platform for near-Landauer-limit computation and provide a foundation for future momentum-assisted superconducting dynamical computing architectures.
Reducing the energy inefficiency of conventional CMOS-based computing devices-which rely on logically irreversible gates to process information-remains both a fundamental engineering challenge and a practical social challenge of increasing importance. We extend an alternative computing paradigm that manipulates microstate distributions to store information in the metastable minima determined by an effective potential energy landscape. These minima serve as mesoscopic memories that are manipulated by a dynamic landscape to perform information processing. Central to our results is the control erase protocol, which controls the landscape's metastable minima to determine whether information is preserved or erased. Importantly, successive protocol executions can implement a NAND gate-a logically irreversible universal logic gate. We show how to practically implement CEs in a device created by two inductively coupled superconducting quantum interference devices (SQUIDs). We identify circuit parameter ranges that give rise to effective CEs and establish the device's robustness against thermally induced errors. These SQUID-based logical devices are capable of operating above GHz frequencies and at the kBT energy scale. Due to this, optimized devices and associated protocols provide a universal-computation substrate that is both computationally fast and energy efficient.
Today's industrial digital logic gates are reaching a technological limit and meanwhile, superconducting circuits produce fundamentally different technologies for the future of digital computing. The standard logic is irreversible and yet superconducting circuits allow digital reversible logic with a much higher energy efficiency per gate operation. Previous reversible gate circuits were “adiabatic,” meaning that they used adiabatic-clocking waveforms for their operation power. However, we are studying logic starting from a ballistic model, where ftuxons enable gates using only energy from their inertia. Our ftuxons are defined in Long Josephson Junctions (LJJs) and may travel ballistically, similar to a particle with negligible damping. Once a ftuxon's energy approaches close enough to the gate, a resonance is induced at the gate and the ftuxon loses its definite topology. Gates are comprised of the (few Josephson-penetration-depth long) ends of LJJs and a connecting circuit interface. Only after the resonance does a ftuxon get formed and yield the gate result without external power: a ftuxon for bit-state 0 or an antiftuxon for bit-state 1. Through earlier analysis of the numerically discovered phenomena we find that dynamics can be described with ftuxon- and antiftuxon-like excitations at the ends of LJJs within the gate. The bit-switching action in our gates is resonant indicating fundamentally different dynamics than the classic model of adiabatic reversible circuits. Our ballistic Reversible Fluxon Logic (RFL) gates have no added damping and calculated energy efficiencies of over 97%. Thus in our dynamical process the “bit energy” is preserved. However, irreversible logic completely dissipates this at each operation (e.g., charging energy in CMOS or SFQ energy in irreversible SFQ logic). An RFL gate can achieve a fast gate operation since its resonance is only few JJ plasma periods. We also describe the CNOT in our technology. It is enabled by a couple of vital gates: A IDSN logic gate, similar to our other ballistic gates, and a Store-aNd-Launch (SNL) timing gate to ensure proper synchronization of the bits. The latter allows bit storage followed by launching of a data ftuxon using an adiabatic pulse from a clock ftuxon with lower energy than the data ftuxon for good CNOT efficiency.
One of the most important features of the quantum computing circuits that distinguishes them from the traditional computational models is their full, physical and logical, reversibility at all stages of the calculations. This makes the large-scale architecture of potential quantum and classical reversible computers quite similar. The goal of this work is to analyze this similarity in the case of reversible superconducting logic circuits based on the recently suggested elementary gate, the nSQUID. Specifically, we present the results of numerical simulations and some limited measurements of a reversible 8-bit circular shift register fabricated at HYPRES, Inc., and working in the classical mode. The measured energy dissipation per bit operation per nSQUID is still about 20 times higher than the thermodynamic reversibility threshold of kBTIn 2 at T ap 4 K. We also discuss qualitatively operation of the reversible circuits of galvan- ically-coupled nSQUIDs in the quantum mode which provides the basis for implementation of "flying" superconducting qubits. Such qubits have several attractive features for Josephson-junction quantum logic devices beyond the single- or two-qubit circuits.
Abstract Reversible logic circuits can perform logic operations in a thermodynamically reversible manner, or without energy dissipation. The reversible quantum-flux-parametron (RQFP) is a reversible logic gate using adiabatic superconductor logic. In the present study, we design and demonstrate a reversible full adder (RFA) using RQFP gates in order to demonstrate that RQFP gates can be used as building blocks to design reversible logic circuits. An analysis of the time evolution of the phase differences across the Josephson junctions in the RFA showed that its logic state can change quasi-statically during a logic operation. Calculation of the energy dissipation of the RFA showed that it decreases in proportion to the operating frequency. These numerical calculation results ensure that the RFA is thermodynamically and logically reversible. In addition, we experimentally demonstrated correct operation of the RFA for all input data combinations. These results reveal that logic circuits designed using RQFP gates can perform reversible computing, i.e. RQFP gates can be used as building blocks of reversible logic circuits.
Alternative computing paradigms open the door to exploiting recent innovations in computational hardware to probe the fundamental thermodynamic limits of information processing. One such paradigm employs superconducting quantum interference devices (SQUIDs) to execute classical computations. This, though, requires constructing sufficiently complex superconducting circuits that support a suite of useful information processing tasks and storage operations, as well as understanding these circuits' energetics. First-principles circuit design leads to prohibitive algebraic complications when deriving the effective equations of motion—complications that to date have precluded achieving these goals, let alone doing so efficiently. We circumvent these complications by (i) specializing our class of circuits and physical operating regimes, (ii) synthesizing existing derivation techniques to suit these specializations, and (iii) implementing solution-finding optimizations which facilitate physically interpreting circuit degrees of freedom that respect physically grounded constraints. This leads to efficient and practical circuit prototyping, as well as accessing scalable circuit architectures. The analytical efficiency is demonstrated by reproducing the potential energy landscape generated by a SQUID. We then show how inductively coupling two SQUIDs produces a device that is capable of executing two-bit computations via its composite potential energy landscape. More generally, the synthesized methods detailed here provide a basis for constructing universal logic gates and investigating their thermodynamic performance.