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arXiv:2311.04858

Scalable Fault-Tolerant Quantum Technologies with Silicon Colour Centres

Stephanie Simmons

Published Nov 8, 2023• 1 citation
arXivHTMLPDF

Abstract

The scaling barriers currently faced by both quantum networking and quantum computing technologies ultimately amount to the same core challenge of distributing high-quality entanglement at scale. In this Perspective, a novel quantum information processing architecture based on optically active spins in silicon is proposed that offers a combined single technological platform for scalable fault-tolerant quantum computing and networking. The architecture is optimized for overall entanglement distribution and leverages colour centre spins in silicon (T centres) for their manufacturability, photonic interface, and high fidelity information processing properties. Silicon nanophotonic optical circuits allow for photonic links between T centres, which are networked via telecom-band optical photons in a highly-connected graph. This high connectivity unlocks the use of low-overhead quantum error correction codes, significantly accelerating the timeline for modular, scalable fault-tolerant quantum repeaters and quantum processors.

DOI
10.48550/arxiv.2311.04858

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The scaling barriers currently faced by both quantum networking and quantum computing technologies ultimately amount to the same core challenge of distributing high-quality entanglement at scale. In this Perspective, a novel quantum information processing architecture based on optically active spins in silicon is proposed that offers a combined single technological platform for scalable fault-tolerant quantum computing and networking. The architecture is optimized for overall entanglement distribution and leverages colour centre spins in silicon (T centres) for their manufacturability, photonic interface, and high fidelity information processing properties. Silicon nanophotonic optical circuits allow for photonic links between T centres, which are networked via telecom-band optical photons in a highly-connected graph. This high connectivity unlocks the use of low-overhead quantum error correction codes, significantly accelerating the timeline for modular, scalable fault-tolerant quantum repeaters and quantum processors.
The scaling barriers currently faced by both quantum networking and quantum computing technologies ultimately amount to the same core challenge of distributing high-quality entanglement at scale. In this Perspective, a novel quantum information-processing architecture based on optically active spins in silicon is proposed that offers a combined single technological platform for scalable fault-tolerant quantum computing and networking. The architecture is optimized for overall entanglement distribution and leverages color-center spins in silicon (T centers) for their manufacturability, photonic interface, and high-fidelity information-processing properties. Silicon nanophotonic optical circuits allow for photonic links between T centers, which are networked via telecom-band optical photons in a highly connected graph. This high connectivity unlocks the use of low-overhead quantum error-correcting codes, significantly accelerating the time line for modular scalable fault-tolerant quantum repeaters and quantum processors. Published by the American Physical Society 2024
General purpose quantum computers will utilize millions of physical qubits, thus requiring an underlying qubit technology that can be manufactured at scale. Integrated silicon photonics is an intrinsically scalable and manufacturable platform where all necessary gates are available to manipulate qubits, encoded in photons, with very high fidelity and low noise. In this talk, we will discuss architectures for fault-tolerant quantum computing with photonics in the newly-introduced fusion-based quantum computing paradigm. Fusion-based quantum computing presents a new framework for fault-tolerant quantum computation, focused on the efficient integration of quantum error correction and physical-level hardware operations. Its primitives, small entangled resource states and projective entangling gates, make it particularly useful in an integrated photonics platform, offering significant architectural simplifications and reducing requirements on physical level operations.
The performance of modular, networked quantum technologies will be strongly dependent upon the quality of their quantum light-matter interconnects. Solid-state colour centres, and in particular T centres in silicon, offer competitive technological and commercial advantages as the basis for quantum networking technologies and distributed quantum computing. These newly rediscovered silicon defects offer direct telecommunications-band photonic emission, long-lived electron and nuclear spin qubits, and proven native integration into industry-standard, CMOS-compatible, silicon-on-insulator (SOI) photonic chips at scale. Here we demonstrate further levels of integration by characterizing T centre spin ensembles in single-mode waveguides in SOI. In addition to measuring long spin T 1 times, we report on the integrated centres’ optical properties. We find that the narrow homogeneous linewidth of these waveguide-integrated emitters is already sufficiently low to predict the future success of remote spin-entangling protocols with only modest cavity Purcell enhancements. We show that further improvements may still be possible by measuring nearly lifetime-limited homogeneous linewidths in isotopically pure bulk crystals. In each case the measured linewidths are more than an order of magnitude lower than previously reported and further support the view that high-performance, large-scale distributed quantum technologies based upon T centres in silicon may be attainable in the near term.
Colour centres in silicon have great potential as single photon sources for quantum technologies. Some of them - like the T centre - also possess optically-active spins that enable spin-photon interfaces for generating entangled photons and multi-spin registers. This paper explores the generation of several types of colour centres in silicon for mass-manufacturable silicon-on-insulator quantum devices. We investigate how different processes in the device development affect the presence of the quantum emitters, including thermal annealing and fabrication steps for optical nanostructures. The study reveals coupled formation dynamics between different colour centres, identifies optimal parameters for annealing processes, and reports on the sensitivity to annealing duration and nanofabrication procedures for photonic integrated circuits. Furthermore, we discern stable optical signals from colour centres in silicon which have not been identified before.
Abstract: This study investigates a topological quantum error-correction framework for scalable photonic quantum-computing architectures in which fusion-based entangling primitives are combined with tensor-network optimization. The central problem addressed is the gap between high-fidelity photonic components and the stringent logical-error rates required for fault-tolerant quantum computation. Photonic platforms offer room-temperature operation, manufacturable silicon-photonic process flows, high-bandwidth optical interconnects and natural compatibility with measurement-based computation; however, photon loss, probabilistic fusion and decoder latency impose architectural constraints that cannot be resolved by hardware fidelity alone. The proposed framework therefore treats hardware metrics, code geometry and decoding as a coupled optimization problem rather than as separate engineering layers. The manuscript develops a mathematically grounded model of surface-code and cluster-state error correction under photonic loss and fusion noise, then evaluates tensor-network contraction as a decoder and resource-allocation method. The data section explicitly uses published real-data-based benchmark inputs from contemporary photonic and quantum-error-correction literature, supplemented by transparent, domain-plausible projections where complete open photonic logical-QEC datasets are not yet available. Results show that tensor-network optimization improves the logical-error index relative to matching-based baselines in the modelled photonic regime, while the feasibility boundary remains dominated by loss, fusion infidelity and real-time decoding latency. The contribution is a reproducible evaluation framework that links topological protection, photonic architecture constraints and decoder design for future scalable fault-tolerant systems. Keywords: topological quantum error correction; surface code; photonic quantum computing; fusion-based quantum computation; tensor-network decoding; loss tolerance; scalable quantum architecture; measurement-based quantum computing; fault tolerance; silicon photonics.
Single photons enable the distribution of quantum information over large distances and thus play a major role in quantum technologies such as communication and computing. Solid-state emitters are practical and efficient sources of single photons that can be manufactured in large numbers. When combined with a spin, the resulting spin-photon interfaces can store quantum states for extended periods and serve as the basis for quantum networks and repeaters. Among the many host materials explored over the past few decades, silicon stands out for its advanced nanofabrication, the maturity of its integrated photonics and microelectronics, and its high isotopic purity, which leads to exceptionally long spin coherence. These properties position silicon single-photon emitters and spin-photon interfaces among the most promising hardware platforms for implementing quantum networks and distributed quantum information processors. This review summarizes the current state of the art and open challenges towards coherent single-photon sources and scalable spin-photon interfaces based on color centers and erbium dopants in nanophotonic silicon structures.