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arXiv:2308.06566 · IEEE Transactions on Applied Superconductivity

4-Bit Factorization Circuit Composed of Multiplier Units With Superconducting Flux Qubits Toward Quantum Annealing

Daisuke Saida, Mutsuo Hidaka, Yuki Yamanashi

Published Oct 25, 2024• 4 citations
arXivHTMLPDF

Abstract

Prime factorization (P=M×N) is considered to be a promising application in quantum computations. We perform 4-bit factorization in experiments using a superconducting flux qubit toward quantum annealing (QA). Our proposed method uses a superconducting quantum circuit implementing a multiplier Hamiltonian, which provides combinations ofMandNas a factorization solution after QA when the integerPis initially set. The circuit comprises multiple multiplier units (MUs) combined with connection qubits. The key points are a native implementation of the multiplier Hamiltonian to the superconducting quantum circuit and its fabrication using a Nb multilayer process with a Josephson junction dedicated to the qubit. The 4-bit factorization circuit comprises 32 superconducting flux qubits. Our method has superior scalability because the Hamiltonian is implemented with fewer qubits than in conventional methods using a chimera graph architecture. We perform experiments at 10 mK to clarify the validity of interconnections of a MU using qubits. We demonstrate experiments at 4.2 K and simulations for the factorization of integers four, six, and nine.

DOI
10.1109/tasc.2024.3486791

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Prime factorization (P=M×N) is considered to be a promising application in quantum computations. We perform 4-bit factorization in experiments using a superconducting flux qubit toward quantum annealing (QA). Our proposed method uses a superconducting quantum circuit implementing a multiplier Hamiltonian, which provides combinations ofMandNas a factorization solution after QA when the integerPis initially set. The circuit comprises multiple multiplier units (MUs) combined with connection qubits. The key points are a native implementation of the multiplier Hamiltonian to the superconducting quantum circuit and its fabrication using a Nb multilayer process with a Josephson junction dedicated to the qubit. The 4-bit factorization circuit comprises 32 superconducting flux qubits. Our method has superior scalability because the Hamiltonian is implemented with fewer qubits than in conventional methods using a chimera graph architecture. We perform experiments at 10 mK to clarify the validity of interconnections of a MU using qubits. We demonstrate experiments at 4.2 K and simulations for the factorization of integers four, six, and nine.
Prime factorization (P = M × N) is a promising application for quantum computing. Shor's algorithm is a key concept for breaking the limit for analyzing P, which cannot be effectively solved by classical computation; however, the algorithm requires error-correctable logical qubits. Here, we describe a quantum annealing method for solving prime factorization. A superconducting quantum circuit with native implementation of the multiplier Hamiltonian provides combinations of M and N as a solution for number P after annealing. This circuit is robust and can be expanded easily to scale up the analysis. We present an experimental and theoretical exploration of the multiplier unit. We demonstrate the 2-bit factorization in a circuit simulation and experimentally at 10 mK. We also explain how the current conditions can be used to obtain high success probability and all candidate factorized elements.
We propose a prime factorizer operated in a framework of quantum annealing (QA). The idea is inverse operation of a multiplier implemented with QA-based Boolean logic circuits. We designed the QA machine on an application-specific-annealing-computing architecture which efficiently increases available hardware budgets at the cost of restricted functionality. The invertible operation of QA logic gates consisting of superconducting flux qubits was confirmed by circuit simulation with classical noise sources. The circuits were implemented and fabricated by using superconducting integrated circuit technologies with Nb/AlOx/Nb Josephson junctions. We also propose a 2.5Dimensional packaging scheme of a qubit-chip/interpose /package-substrate structure for realizing practically large-scale QA systems.
We propose a prime factoring machine operated in a frame work of quantum annealing (QA). The idea is inverse operation of a quantum-mechanically reversible multiplier implemented with QA-based Boolean logic circuits. We designed the QA machine on an application-specific-annealing-computing architecture which efficiently increases available hardware budgets at the cost of restricted functionality. The circuits are to be implemented and fabricated by using superconducting integrated circuit technology. We propose a three-dimensional packaging scheme of a qubit-chip / interposer / package-substrate structure for realizing practically-large scale QA systems.
The applicability of quantum annealing to various problems can be improved by expressing the Hamiltonian using a circuit satisfiability problem. We investigate the detailed characteristics of the NOR/NAND functions of a superconducting quantum circuit, which are the basic building blocks to implementing various types of problem Hamiltonians. The circuit is composed of superconducting flux qubits with all-to-all connectivity, where direct magnetic couplers are utilized instead of the variable couplers in the conventional superconducting quantum circuit. This configuration provides efficient scalability because the problem Hamiltonian is implemented using fewer qubits. We present an experiment with a complete logic operation of NOR/NAND, in which the circuit produces results with a high probability of success for arbitrary combinations of inputs. The features of the quantum circuit agree qualitatively with the theory, especially the mechanism for an operation under external flux modulation. Moreover, by calibrating the bias conditions to compensate for the offset flux from the surrounding circuit, the quantum circuit quantitatively agrees with the theory. To achieve true quantum annealing, we discuss the effects of the reduction in electric noise in quantum annealing.
Superconducting quantum computers are rapidly reaching scales where bottlenecks to scaling arise from the practical aspects of the fabrication process. To improve quantum computer performance, implementation technology that guarantees the scalability of the number of qubits is essential. Increasing the degrees of freedom in routing by 2.5-dimensional implementation is important for realizing circuit scalability. We report an implementation technology to overcome the scaling bottlenecks using a reliable connection qubit with a demonstration of quantum annealing. The method comprises interconnection based on quantum annealing using a superconducting flux qubit, precise coupling status control, and flip-chip bonding. We perform experiments and simulations with a proof-of-concept demonstration of qubit coupling via interconnection using a flux qubit. The coupling status is strictly controllable by quantum annealing. A low-temperature flip-chip bonding technology is introduced for the 2.5-dimensional interconnection. The superconducting flux qubit, formed across two different chips via bumps, is demonstrated for the first time to show a state transition like that in a conventional qubit. The quantum annealing flux qubit and flip-chip bonding enable new interconnections between qubits. A perspective on the possibility of applying this technology to the connection between gate-type qubits is described.
The superconducting quantum annealing circuit is constructed with four Nb layers and Josephson junctions with a critical current density of 1 μA/μm2. Three key points exist to perform the quantum annealing in experiments. First, the shape of the energy potential of the qubit should be accurately designed. Second, the current pulses for modulation of the shape of the energy potential must propagate to the qubit accurately. Third is the suppression of noise in the environment where the qubit is placed. Furthermore, calibration of the measurement data is necessary with consideration of the experimental environment. In this paper, I will present a mechanism for realizing quantum annealing from two perspectives: a theoretical model and an experiment. Experimental findings on quantum annealing will contribute to study of the surrounding circuit of a gate-type quantum computer.