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arXiv:2210.14335

A Depolarizing Noise-aware Transpiler for Optimal Amplitude Amplification

Debashis Ganguly, Ahn, Wonsun

Published Oct 25, 2022• 0 citations
arXivHTMLPDF

Abstract

Amplitude amplification provides a quadratic speed-up for an array of quantum algorithms when run on a quantum machine perfectly isolated from its environment. However, the advantage is substantially diminished as the NISQ-era quantum machines lack the large number of qubits necessary to provide error correction. Noise in the computation grows with the number of gate counts in the circuit with each iteration of amplitude amplification. After a certain number of amplifications, the loss in accuracy from the gate noise starts to overshadow the gain in accuracy due to amplification, forming an inflection point. Beyond this point, accuracy continues to deteriorate until the machine reaches a maximally mixed state where the result is uniformly random. Hence, quantum transpilers should take the noise parameters of the underlying quantum machine into consideration such that the circuit can be optimized to attain the maximal accuracy possible for that machine. In this work, we propose an extension to the transpiler that predicts the accuracy of the result at every amplification with high fidelity by applying pure Bayesian analysis to individual gate noise rates. Using this information, it finds the inflection point and optimizes the circuit by halting amplification at that point. The prediction is made without needing to execute the circuit either on a quantum simulator or an actual quantum machine.

DOI
10.48550/arxiv.2210.14335

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Amplitude amplification provides a quadratic speed-up for an array of quantum algorithms when run on a quantum machine perfectly isolated from its environment. However, the advantage is substantially diminished as the NISQ-era quantum machines lack the large number of qubits necessary to provide error correction. Noise in the computation grows with the number of gate counts in the circuit with each iteration of amplitude amplification. After a certain number of amplifications, the loss in accuracy from the gate noise starts to overshadow the gain in accuracy due to amplification, forming an inflection point. Beyond this point, accuracy continues to deteriorate until the machine reaches a maximally mixed state where the result is uniformly random. Hence, quantum transpilers should take the noise parameters of the underlying quantum machine into consideration such that the circuit can be optimized to attain the maximal accuracy possible for that machine. In this work, we propose an extension to the transpiler that predicts the accuracy of the result at every amplification with high fidelity by applying pure Bayesian analysis to individual gate noise rates. Using this information, it finds the inflection point and optimizes the circuit by halting amplification at that point. The prediction is made without needing to execute the circuit either on a quantum simulator or an actual quantum machine.
Today’s Noisy Intermediate-Scale Quantum (NISQ) computers support only limited sets of available quantum gates and restricted connectivity. Therefore, quantum algorithms must be transpiled in order to become executable on a given NISQ computer; transpilation is a complex and computationally heavy process. Moreover, NISQ computers are affected by noise that changes over time, and periodic calibration provides relevant error rates that should be considered during transpilation. Variational algorithms, which form one main class of computations on NISQ platforms, produce a number of similar yet not identical quantum "ansatz" circuits. In this work, we present a transpilation methodology optimized for variational algorithms under potentially changing error rates. We divide transpilation into three steps: (1) noise-unaware and computationally heavy pre-transpilation; (2) fast noise-aware matching; and (3) fast decomposition followed by heuristic optimization. For a complete run of a variational algorithm under constant error rates, only step (3) needs to be executed for each new ansatz circuit. Step (2) is required only if the error rates reported by calibration have changed significantly since the beginning of the computation. The most expensive Step (1) is executed only once for the whole run. This distribution is helpful for incremental, calibration-aware transpilation when the variational algorithm adapts its own execution to changing error rates. Experimental results on IBM’s quantum computer show the low latency and robust results obtained by calibration-aware transpilation.
In the noisy intermediate-scale quantum (NISQ) era, distributed quantum computation has garnered considerable interest, as it overcomes the physical limitations of single-device architectures and enables scalable quantum information processing. In this study, we focus on the challenge of achieving exact amplitude amplification for quantum states with arbitrary amplitude distributions and subsequently propose a Distributed Exact Quantum Amplitude Amplification Algorithm (DEQAAA). Specifically, (1) it supports partitioning across any number of nodes ttt within the range 2≤t≤n2 \leq t \leq n2≤t≤n; (2) the maximum qubit count required for any single node is expressed as $\max \left(n_0,n_1,\dots,n_{t-1} \right) $, where njn_jnj​ represents the number of qubits at the jjj-th node, with ∑j=0t−1nj=n\sum_{j=0}^{t-1} n_j =n∑j=0t−1​nj​=n; (3) it can realize exact amplitude amplification for multiple targets of a quantum state with arbitrary amplitude distributions; (4) we verify the effectiveness of DEQAAA by resolving a specific exact amplitude amplification task involving two targets (8 and 14 in decimal) via MindSpore Quantum, a quantum simulation software, with tests conducted on 4-qubit, 6-qubit, 8-qubit and 10-qubit systems. Notably, through the decomposition of Cn−1PSC^{n-1}PSCn−1PS gates, DEQAAA demonstrates remarkable advantages in both quantum gate count and circuit depth as the qubit number scales, thereby boosting its noise resilience. In the 10-qubit scenario, for instance, it achieves a reduction of over 97%97\%97% in both indicators compared to QAAA and EQAAA, underscoring its outstanding resource-saving performance.
Noisy Intermediate-Scale Quantum (NISQ) devices are promising platforms for practical quantum computing, but their performance is significantly affected by limited qubit availability, gate errors, decoherence, circuit depth, and hardware-dependent noise. Conventional quantum circuits are generally designed and optimized before execution and may not respond effectively to changing hardware conditions during computation. This research proposes a Self-Adaptive Quantum Circuit framework that dynamically modifies quantum circuits according to the current computational resources and noise characteristics of NISQ devices. The proposed framework monitors parameters such as qubit fidelity, gate error rates, circuit depth, execution time, and resource availability, and automatically selects suitable circuit configurations to improve computational performance. Adaptive mechanisms can be employed to reduce unnecessary gates, optimize qubit utilization, and mitigate the impact of hardware noise while maintaining the required computational accuracy. The framework will be evaluated using simulation platforms and available NISQ quantum hardware, comparing adaptive circuits with conventional static circuits using metrics such as accuracy, fidelity, circuit depth, gate count, execution time, and error rate. The expected outcome is a resource-efficient and noise-aware quantum circuit optimization approach capable of improving the reliability and performance of quantum applications on near-term quantum hardware. The proposed research aims to contribute toward more practical, flexible, and hardware-aware quantum computing systems for NISQ-era applications. Keywords: NISQ Computing, Self-Adaptive Quantum Circuits, Quantum Circuit Optimization, Quantum Error Mitigation, Quantum Noise, Quantum Computing.
Transpilation, particularly noise-aware optimization, is widely regarded as essential for maximizing the performance of quantum circuits on superconducting quantum computers. The common wisdom is that each circuit should be transpiled using up-to-date noise calibration data to optimize fidelity. In this work, we revisit the necessity of frequent noise-adaptive transpilation, conducting an in-depth empirical study across five IBM 127-qubit quantum computers and 16 diverse quantum algorithms. Our findings reveal novel and interesting insights: (1) noise-aware transpilation leads to a heavy concentration of workloads on a small subset of qubits, which increases output error variability; (2) using random mapping can mitigate this effect while maintaining comparable average fidelity; and (3) circuits compiled once with calibration data can be reliably reused across multiple calibration cycles and time periods without significant loss in fidelity. These results suggest that the classical overhead associated with daily, per-circuit noise-aware transpilation may not be justified. We propose lightweight alternatives that reduce this overhead without sacrificing fidelity – offering a path to more efficient and scalable quantum workflows.
The rapid advancement of Noisy Intermediate-Scale Quantum (NISQ) devices has driven the need for efficient design automation tools that can translate complex engineering models into executable quantum circuits. This study explores the development of automated quantum circuit design frameworks focused on gate optimization and noise-aware compilation, enabling practical quantum computation for engineering applications such as optimization, simulation, and control systems. Traditional circuit design methods often fail to account for hardware constraints, decoherence, and gate infidelity, which significantly affect computational accuracy on NISQ devices. To address these challenges, this research introduces a hybrid automation approach combining quantum transpilation, variational circuit pruning, and error-aware synthesis algorithms to enhance circuit reliability and scalability. The framework integrates quantum-classical co-design principles to optimize both logical and physical circuit layers, leveraging hardware-specific calibration data to adapt compilation strategies dynamically. Through simulations and benchmark analysis, the proposed system demonstrates significant improvements in quantum resource utilization, error mitigation, and gate depth reduction compared to conventional compilation methods. This work underscores the growing importance of design automation in quantum engineering, where algorithmic efficiency must be harmonized with physical constraints to realize functional and scalable quantum workflows. By establishing a methodology for gate-level optimization and noise-adaptive design, the study contributes to bridging the gap between theoretical quantum algorithms and real-world engineering implementations within the NISQ computing era.
Hybridizing machine learning (ML) with quantum computing has become an attractive strategy to increase computational power on Noisy Intermediate Scale Quantum (NISQ) devices. Although these can be potentially quantum advantage devices, their qubit numbers and noise are bounded and there are challenges when it comes to practical quantum circuit realization. This work concentrates on the creation of optimized quantum circuits via ML-based strategies, to enhance the performance of the circuits, to reduce the error rate and to accommodate the particular noise profile of the hardware of NISQ devices. The resulting suboptimal mappings with little or no consideration of noise and hardware topology in traditional quantum compilers can ruin the fidelity of quantum algorithm. Leveraging machine learning, and specifically reinforcement and supervised learning methods, our method learns to optimize compilation strategy for specific quantum hardware architecture. The paper proposes a framework that uses machine learning models to predict qubit mappings, gate decompositions, and transpilation paths that minimize gate depth and error accumulation. We also investigate transfer learning methods for propagating the learned compilation strategies to novel NISQ machines. Such methods are empirically validated on both simulated and real quantum hardware backends, providing evidence of circuit depth, execution time and error reductions. The results show that ML-assisted compilation can achieve better success probabilities for benchmark quantum algorithms like VQE and QAOA than conventional compilers. Furthermore, the work examines the interpretability of ML models providing hardware-aware optimization recommendations and understanding the noise patterns and methods of error correction. Our work highlights the key role of ML for transferring between theoretical quantum algorithms and their practical NISQ implementations. This integration boosts the immediate applicability of existing quantum devices and provides a basis for adaptive and scalable likelihood-based compilation for the era of fault-tolerant quantum computation. Our results motivate further investigation of hybrid classical-quantum workflows, in which ML iteratively improves compilation in accordance with changing hardware noise and capabilities. By improving quantum circuit compilation onNISQ computers, this work is taking steps toward the realization of quantum advantage in application scenarios such as optimization, cryptography, and quantum simulation without needing to wait for fully fault-tolerant large-scale quantum computers.