Near-term quantum computers are primarily limited by errors in quantum operations (or gates) between two quantum bits (or qubits). A physical machine typically provides a set of basis gates that include primitive 2-qubit (2Q) and 1-qubit (1Q) gates that can be implemented in a given technology. 2Q entangling gates, coupled with some 1Q gates, allow for universal quantum computation. In superconducting technologies, the current state of the art is to implement the same 2Q gate between every pair of qubits (typically an XX-or XY-type gate). This strict hardware uniformity requirement for 2Q gates in a large quantum computer has made scaling up a time and resource-intensive endeavor in the lab. We propose a radical idea – allow the 2Q basis gate(s) to differ between every pair of qubits, selecting the best entangling gates that can be calibrated between given pairs of qubits. This work aims to give quantum scientists the ability to run meaningful algorithms with qubit systems that are not perfectly uniform. Scientists will also be able to use a much broader variety of novel 2Q gates for quantum computing. We develop a theoretical framework for identifying good 2Q basis gates on “nonstandard” Cartan trajectories that deviate from “standard” trajectories like XX. We then introduce practical methods for calibration and compilation with nonstandard 2Q gates, and discuss possible ways to improve the compilation. To demonstrate our methods in a case study, we simulated both standard XY-type trajectories and faster, nonstandard trajectories using an entangling gate architecture with far-detuned transmon qubits. We identify efficient 2Q basis gates on these nonstandard trajectories and use them to compile a number of standard benchmark circuits such as QFT and QAOA. Our results demonstrate an 8x improvement over the baseline 2Q gates with respect to speed and coherence-limited gate fidelity.
Near-term quantum computers are primarily limited by errors in quantum operations (or gates) between two quantum bits (or qubits). A physical machine typically provides a set of basis gates that include primitive 2-qubit (2Q) and 1-qubit (1Q) gates that can be implemented in a given technology. 2Q entangling gates, coupled with some 1Q gates, allow for universal quantum computation. In superconducting technologies, the current state of the art is to implement the same 2Q gate between every pair of qubits (typically an XX-or XY-type gate). This strict hardware uniformity requirement for 2Q gates in a large quantum computer has made scaling up a time and resource-intensive endeavor in the lab. We propose a radical idea – allow the 2Q basis gate(s) to differ between every pair of qubits, selecting the best entangling gates that can be calibrated between given pairs of qubits. This work aims to give quantum scientists the ability to run meaningful algorithms with qubit systems that are not perfectly uniform. Scientists will also be able to use a much broader variety of novel 2Q gates for quantum computing. We develop a theoretical framework for identifying good 2Q basis gates on “nonstandard” Cartan trajectories that deviate from “standard” trajectories like XX. We then introduce practical methods for calibration and compilation with nonstandard 2Q gates, and discuss possible ways to improve the compilation. To demonstrate our methods in a case study, we simulated both standard XY-type trajectories and faster, nonstandard trajectories using an entangling gate architecture with far-detuned transmon qubits. We identify efficient 2Q basis gates on these nonstandard trajectories and use them to compile a number of standard benchmark circuits such as QFT and QAOA. Our results demonstrate an 8x improvement over the baseline 2Q gates with respect to speed and coherence-limited gate fidelity.
Most quantum compiling efforts rely on standard two-qubit basis gates, such as CX and iSWAP, to implement general quantum operations. However, with the advancement of quantum architecture design, more nonstandard two-qubit gates can now be implemented and calibrated on devices. Using these nonstandard gates may improve the performance of quantum computation. Despite this potential, it remains unclear how to efficiently incorporate these nonstandard gates into the quantum instruction set to enhance quantum advantage. To address this, we propose an analytical framework that facilitates the design of quantum instruction sets based on nonstandard gates. Our approach is grounded in the KAK decomposition and an analysis of the Cartan coordinate of two-qubit operations, enabling analytical conversion between any two two-qubit operations. This framework also demonstrates the lower and upper bounds of the conversion cost, revealing the relationship between the entangling power of two-qubit instructions and their Cartan coordinates. We further develop a compiler based on the analytical framework, which reduces the unitary decomposition cost with nonstandard two-qubit instructions. Using the proposed compiler, we evaluate various options for designing a quantum instruction set based on nonstandard gates. Our experiments demonstrate the efficiency of the proposed framework in the quantum instruction set design. Compared to the state-of-the-art method that is based on the numerical search, our framework reduces the time/resource overhead of exploring the instruction set design space by thousands of times. Moreover, with the established framework, we propose feasible designs for the quantum instruction set by modeling real-world quantum processors, further promoting the quantum advantage.
We propose and validate on real quantum computing hardware a new method for extended two-qubit gate set design, replacing iterative, fine calibration with fast characterization of a small number of gate parameters which are then tracked and corrected in circuit compilation. Coherent contributions to the pulse unitary that would traditionally be considered sources of error are treated as part of the gate definition, and compensated in software via single-qubit rotations. This approach enables rapid device-wide generation of high-fidelity two-qubit entangling gates, which are combined with standard calibrated gates to produce an expanded gate set. We show how these gates are directly usable as part of a quantum compiler, synthesizing generic two-qubit circuit blocks into minimal-duration sequences of the characterized gates interleaved with compensating single-qubit rotations. Benchmarking against circuits compiled using the default CX gate alone on 127-qubit IBM hardware shows up to 7X improvement in success probability for Quantum Fourier Transform circuits up to 26 qubits, and up to 9X lower mean-square error in Trotter simulations of the one-dimensional transverse-field Ising model. Our hardware-agnostic characterization and compilation methodology makes it practical to scale up expressive gate sets on quantum computing architectures while minimizing the need for onerous fine-tuning of low-level control waveforms.
Quantum algorithms on near-term quantum processors are typically executed using shallow quantum circuits composed of one- and two-qubit gates. However, as circuit depth and gate number increase, gate imperfections and qubit decoherence begin to dominate, limiting algorithmic complexity. An alternative approach is to explore gates involving more than two qubits. In previous work (X. Wu et al., Physical Review X 14, 041030 (2024)), we demonstrated a new superconducting qubit architecture with user-selectable two-qubit interactions via a reconfigurable router, used to connect pairs of qubits. Here, we leverage this novel architecture to realize programmable and efficient multi-qubit operations involving more than two qubits, resulting in faster preparation of multi-qubit entangled states with good fidelities. We also successfully apply model-free reinforcement learning to perform multi-qubit gates, including training a two-qubit controlled-Z gate as well as three-qubit controlled-SWAP and controlled-controlled-phase (Fredkin and Toffoli) gates. Higher nth-order gates may also be feasible, using our high-connectivity router design. This could provide a more efficient and higher-fidelity implementation of complex quantum algorithms and a more practical approach to quantum computation.
Gate-based quantum computers typically encode and process information in two-dimensional units called qubits.Using d-dimensional qudits instead may offer intrinsic advantages, including more efficient circuit synthesis, problem-tailored encodings and embedded error correction.In this work, we design a superconducting qudit-based quantum processor wherein the logical space of transmon qubits is extended to higher-excited levels.We propose a universal gate set featuring a two-qudit cross-resonance entangling gate, for which we predict fidelities beyond 99% in the d = 4 case of ququarts with realistic experimental parameters.Furthermore, we present a decomposition routine that compiles general qudit unitaries into these elementary gates, requiring fewer entangling gates than qubit alternatives.As proof-of-concept applications, we numerically demonstrate the synthesis of SU(16) gates for noisy quantum hardware and an embedded error-correction sequence that encodes a qubit memory in a transmon ququart to protect against pure dephasing noise.We conclude that universal qudit control-a valuable extension to the operational toolbox of superconducting quantum information processing-is within reach of current transmon-based architectures and has applications to near-term and long-term hardware.
Abstract As quantum processors grow in scale and reliability, the need for efficient quantum gate decomposition of circuits to a set of specific available gates, becomes ever more critical. The decomposition of a particular algorithm into a sequence of these available gates is not unique. Thus, the fidelity of an algorithm’s implementation can be increased by choosing an optimized decomposition. This is true both for noisy intermediate-scale quantum platforms as well as for implementation of quantum error correction schemes. Here we present a compilation scheme which implements a general-circuit decomposition to a sequence of Ising-type, long-range, multi-qubit (MQ) entangling gates, that are separated by layers of single qubit rotations. We use trapped ions as an example in which MQ gates naturally arise, yet any system that has connectivity beyond nearest-neighbors may gain from our approach. We evaluate our methods using the quantum volume (QV) test over N qubits. In this context, our method replaces 3 N 2 / 2 two-qubit gates with 2 N + 1 MQ gates. Furthermore, our method minimizes the magnitude of the entanglement phases, which typically enables an improved implementation fidelity, by using weaker driving fields or faster realizations. We numerically test our compilation and show that, compared to conventional realizations with sequential two-qubit gates, our compilations improves the logarithm of QV by 20% to 25%.
Recent developments in engineering and algorithms have made real-world applications in quantum computing possible in the near future. Existing quantum programming languages and compilers use a quantum assembly language composed of 1- and 2-qubit (quantum bit) gates. Quantum compiler frameworks translate this quantum assembly to electric signals (called control pulses) that implement the specified computation on specific physical devices. However, there is a mismatch between the operations defined by the 1- and 2-qubit logical ISA and their underlying physical implementation, so the current practice of directly translating logical instructions into control pulses results in inefficient, high-latency programs. To address this inefficiency, we propose a universal quantum compilation methodology that aggregates multiple logical operations into larger units that manipulate up to 10 qubits at a time. Our methodology then optimizes these aggregates by (1) finding commutative intermediate operations that result in more efficient schedules and (2) creating custom control pulses optimized for the aggregate (instead of individual 1- and 2-qubit operations). Compared to the standard gate-based compilation, the proposed approach realizes a deeper vertical integration of high-level quantum software and low-level, physical quantum hardware. We evaluate our approach on important near-term quantum applications on simulations of superconducting quantum architectures. Our proposed approach provides a mean speedup of 5×, with a maximum of 10×. Because latency directly affects the feasibility of quantum computation, our results not only improve performance but also have the potential to enable quantum computation sooner than otherwise possible.