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arXiv:2206.14104

Compact vacuum gap transmon qubits: Selective and sensitive probes for superconductor surface losses

Martin Žemlička, Elena S. Redchenko, Matilda Peruzzo, Farid Hassani, Andrea Trioni, Shabir Barzanjeh, J. M. Fink

Published Jun 28, 2022• 0 citations
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Abstract

State-of-the-art transmon qubits rely on large capacitors which systematically improves their coherence due to reduced surface loss participation. However, this approach increases both the footprint and the parasitic cross-coupling and is ultimately limited by radiation losses - a potential roadblock for scaling up quantum processors to millions of qubits. In this work we present transmon qubits with sizes as low as 36$ \times $39$ μ$m$^2$ with $\gtrsim$100 nm wide vacuum gap capacitors that are micro-machined from commercial silicon-on-insulator wafers and shadow evaporated with aluminum. After the release in HF vapor we achieve a vacuum participation ratio up to 99.6\% in an in-plane design that is compatible with standard coplanar circuits. Qubit relaxation time measurements for small gaps with high vacuum electric fields of up to 22 V/m reveal a double exponential decay indicating comparably strong coupling to long-lived two-level-systems (TLS). The exceptionally high selectivity of $>$20 dB to the superconductor-vacuum surface allows to precisely back out the sub-single-photon dielectric loss tangent of aluminum oxide exposed to ambient conditions. In terms of future scaling potential we achieve a qubit quality factor by footprint area of $20 μ\mathrm{s}^{-2}$, which is on par with the highest $T_1$ devices relying on larger geometries and expected to improve substantially for lower loss superconductors like NbTiN, TiN or Ta.

DOI
10.48550/arxiv.2206.14104

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State-of-the-art transmon qubits rely on large capacitors which systematically improves their coherence due to reduced surface loss participation. However, this approach increases both the footprint and the parasitic cross-coupling and is ultimately limited by radiation losses - a potential roadblock for scaling up quantum processors to millions of qubits. In this work we present transmon qubits with sizes as low as 36×\times×39μ μμm2^22 with ≳\gtrsim≳100 nm wide vacuum gap capacitors that are micro-machined from commercial silicon-on-insulator wafers and shadow evaporated with aluminum. After the release in HF vapor we achieve a vacuum participation ratio up to 99.6% in an in-plane design that is compatible with standard coplanar circuits. Qubit relaxation time measurements for small gaps with high vacuum electric fields of up to 22 V/m reveal a double exponential decay indicating comparably strong coupling to long-lived two-level-systems (TLS). The exceptionally high selectivity of >>>20 dB to the superconductor-vacuum surface allows to precisely back out the sub-single-photon dielectric loss tangent of aluminum oxide exposed to ambient conditions. In terms of future scaling potential we achieve a qubit quality factor by footprint area of 20μs−220 μ\mathrm{s}^{-2}20μs−2, which is on par with the highest T1T_1T1​ devices relying on larger geometries and expected to improve substantially for lower loss superconductors like NbTiN, TiN or Ta.
State-of-the-art transmon qubits rely on large capacitors, which systematically improve their coherence due to reduced surface-loss participation. However, this approach increases both the footprint and the parasitic cross-coupling and is ultimately limited by radiation losses---a potential roadblock for scaling up quantum processors to millions of qubits. In this work we present transmon qubits with sizes as low as $36\phantom{\rule{0.2em}{0ex}}\ifmmode\times\else\texttimes\fi{}\phantom{\rule{0.2em}{0ex}}39\phantom{\rule{0.2em}{0ex}}\text{\ensuremath{\mu}}{\mathrm{m}}^{2}$ with $\ensuremath{\gtrsim}100$-nm-wide vacuum-gap capacitors that are micromachined from commercial silicon-on-insulator wafers and shadow evaporated with aluminum. We achieve a vacuum participation ratio up to 99.6% in an in-plane design that is compatible with standard coplanar circuits. Qubit relaxation-time measurements for small gaps with high zero-point electric field variance of up to 22 V/m reveal a double exponential decay indicating comparably strong qubit interaction with long-lived two-level systems. The exceptionally high selectivity of up to 20 dB to the superconductor-vacuum interface allows us to precisely back out the sub-single-photon dielectric loss tangent of aluminum oxide previously exposed to ambient conditions. In terms of future scaling potential, we achieve a ratio of qubit quality factor to a footprint area equal to $20\phantom{\rule{0.2em}{0ex}}\text{\ensuremath{\mu}}{\mathrm{m}}^{\ensuremath{-}2}$, which is comparable with the highest T1{T}_{1}T1​ devices relying on larger geometries, a value that could improve substantially for lower surface-loss superconductors.
Abstract Surface dielectric loss from superconducting transmon qubits is believed to be one of the dominant sources of decoherence. Reducing surface dielectric loss is crucial for achieving a high quality factor and a long relaxation time (T 1), which can be engineered by carefully changing the geometry of a transmon. In this paper, we present a shape-optimization approach to reduce surface dielectric loss in a transmon qubit. The capacitor pads and junction wires of transmons are shaped as spline curves and optimized through the finite-element method and a global optimization algorithm. We find that the participation ratio of capacitor pads and junction wires can be reduced by 15 % − 18 % and 22 % − 26 % compared to previous designs, while the overall footprint and anharmonicity are maintained at acceptable values. As a result, the two-level system-limited quality factor and the corresponding T 1 were increased by 21.6%.
Significant progress has been made in building large-scale superconducting quantum processors based on flip-chip technology. In this work, we use flip-chip technology to realize a modified transmon qubit, denoted as the “flipmon,” whose large shunt capacitor is replaced by a vacuum-gap parallel plate capacitor. We place one of the qubit pads and a single Josephson junction on the bottom chip and the other pad on the top chip, which is galvanically connected with the junction through an indium bump. The electric field energy participation ratio can arrive at nearly 53% in air when the vacuum-gap is about 5 μm, thus potentially leading to a lower dielectric loss. The coherence times of the flipmons are obtained in the range of 30–60 μs, which are comparable with that of conventional transmons with similar fabrication processes. The electric field simulation indicates that the metal-air interface's energy participation ratio increases significantly and may dominate the flipmon's decoherence. This suggests that more careful surface treatment needs to be considered. No evidence shows that the indium bumps inside the flipmons cause significant decoherence. With well-designed geometry and good surface treatment, the coherence of the flipmons can be further improved.
We demonstrate a superconducting transmon qubit in which a Josephson junction has been engineered to act as its own parallel shunt capacitor. This merged-element transmon potentially offers a smaller footprint than conventional transmons. Because it concentrates the electromagnetic energy inside the junction, it reduces the relative electric field participation from other interfaces. By combining micrometer-scale Al\mathrm{Al}Al/AlO\mathrm{Al}\mathrm{O}AlOx{}_{x}x​/Al\mathrm{Al}Al junctions with long oxidations, we produce functional devices with EJ/EC{E}_{J}/{E}_{C}EJ​/EC​ in the low-transmon regime (${E}_{J}/{E}_{C}\ensuremath{\lesssim}30$). Cryogenic III-VVV measurements show a sharp dI/dVdI/dVdI/dV structure with low subgap conduction. Qubit spectroscopy of tunable versions shows a small number of avoided level crossings, suggesting the presence of two-level systems. We observe mean T1{T}_{1}T1​ times typically in the range of $10--90\phantom{\rule{0.2em}{0ex}}\ensuremath{\mu}\mathrm{s}$, with some annealed devices exhibiting ${T}_{1}>100\phantom{\rule{0.2em}{0ex}}\ensuremath{\mu}\mathrm{s}$ over several hours. The results suggest that energy relaxation in conventional small-junction transmons is not limited by junction loss.
Vacuum-gap capacitors have recently attracted significant interest in superconducting circuit platforms due to their compact design and exceptionally low dielectric losses in the microwave regime. Their intrinsic ability to support mechanical vibrational modes makes them well-suited for circuit optomechanics. However, precise control over the gap size and the realization of high-coherence mechanical modes remain longstanding challenges. Here, we present a detailed and scalable fabrication process for vacuum-gap capacitors that support ultra-high-coherence mechanical motion, exhibit low microwave loss, and occupy a significantly smaller footprint compared to conventional planar geometries. By employing a planarized SiO2\mathrm{SiO}_2SiO2​ sacrificial layer, we achieve vacuum gaps on the order of 150 nm. Using this platform, we have recently demonstrated ground-state cooling and motion squeezing of a mechanical oscillator with a quality factor of 40 million, a 100-fold improvement compared to prior works, as well as a single-photon optomechanical coupling rate of approximately 15Hz. Additional achievements include the realization of an optomechanical topological lattice with 24 sites and the observation of quantum collective dynamics in a mechanical hexamer. Collectively, these results underscore the potential of vacuum-gap capacitors as a platform for coupling superconducting qubits to mechanical systems, enabling quantum storage, and probing gravitational effects in quantum mechanics.
Quantum sensing and computation can be realized with superconducting microwave circuits. Qubits are engineered quantum systems of capacitors and inductors with non-linear Josephson junctions. They operate in the single-excitation quantum regime, photons of 27μ27 μ27μeV at 6.5 GHz. Quantum coherence is fundamentally limited by materials defects, in particular atomic-scale parasitic two-level systems (TLS) in amorphous dielectrics at circuit interfaces.[1] The electric fields driving oscillating charges in quantum circuits resonantly couple to TLS, producing phase noise and dissipation. We use coplanar niobium-on-silicon superconducting resonators to probe decoherence in quantum circuits. By selectively modifying interface dielectrics, we show that most TLS losses come from the silicon surface oxide, and most non-TLS losses are distributed throughout the niobium surface oxide. Through post-fabrication interface modification we reduced TLS losses by 85% and non-TLS losses by 72%, obtaining record single-photon resonator quality factors above 5 million and approaching a regime where non-TLS losses are dominant. [1]Müller, C., Cole, J. H. & Lisenfeld, J. Towards understanding two-level-systems in amorphous solids: insights from quantum circuits. Rep. Prog. Phys. 82, 124501 (2019)