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arXiv:2003.04941 · Physical Review A

Zero-noise extrapolation for quantum-gate error mitigation with identity insertions

Andre He, Benjamin Philip Nachman, Wibe Albert de Jong, C. Bauer

Published Jul 29, 2020• 149 citations
arXivHTMLPDF

Abstract

Quantum-gate errors are a significant challenge for achieving precision measurements on noisy intermediate-scale quantum (NISQ) computers. This paper focuses on zero-noise extrapolation (ZNE), a technique that can be implemented on existing hardware, studying it in detail and proposing modifications to existing approaches. In particular, we consider identity insertion methods for amplifying noise because they are hardware agnostic. We build a mathematical formalism for studying existing ZNE techniques and show how higher order polynomial extrapolations can be used to systematically reduce depolarizing errors. Furthermore, we introduce a method for amplifying noise that uses far fewer gates than traditional methods. This approach is compared with existing methods for simulated quantum circuits. Comparable or smaller errors are possible with fewer gates, which illustrates the potential for empowering an entirely new class of moderate-depth circuits on near term hardware.

DOI
10.1103/physreva.102.012426

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Quantum-gate errors are a significant challenge for achieving precision measurements on noisy intermediate-scale quantum (NISQ) computers. This paper focuses on zero-noise extrapolation (ZNE), a technique that can be implemented on existing hardware, studying it in detail and proposing modifications to existing approaches. In particular, we consider identity insertion methods for amplifying noise because they are hardware agnostic. We build a mathematical formalism for studying existing ZNE techniques and show how higher order polynomial extrapolations can be used to systematically reduce depolarizing errors. Furthermore, we introduce a method for amplifying noise that uses far fewer gates than traditional methods. This approach is compared with existing methods for simulated quantum circuits. Comparable or smaller errors are possible with fewer gates, which illustrates the potential for empowering an entirely new class of moderate-depth circuits on near term hardware.
Increasing the utility of currently available Noisy Intermediate-Scale Quantum (NISQ) devices requires developing efficient methods to mitigate hardware errors. In this work we propose a novel Cyclic Layout Permutations-based Zero-Noise Extrapolation (CLP-ZNE) protocol for such a task. The method leverages the inherent non-uniformity of gate errors in NISQ hardware to extrapolate the expectation value, averaged over cyclic circuit layout permutations, to the level of zero noise. In contrast to the previous layout permutation based approaches, for an nnn-qubit circuit CLP-ZNE requires execution of only O(n)O(n)O(n) and at most O(n2)O(n^2)O(n2) different circuit layouts for circuits of one-dimensional and arbitrary connectivity, respectively. When benchmarked against noise channels modeling the IBM Torino quantum computer, the method reduces a typical error in expectation values of n=12n=12n=12 qubit circuits by an order of magnitude, outperforming standard unitary folding ZNE. By demonstrating the ability to mitigate noise of real hardware specifications, including both depolarizing and T1/T2T_1/T_2T1​/T2​ relaxation processes, these results give evidence for the applicability of CLP-ZNE to present-day NISQ processors.
Zero-noise extrapolation (ZNE) is a widely used technique for gate-error mitigation on near-term quantum computers because it can be implemented in software and does not require knowledge of the quantum computer noise parameters. Traditional ZNE requires a significant resource overhead in terms of quantum operations. A recent proposal using a targeted (or random) instead of fixed identity insertion method (RIIM versus FIIM) requires significantly fewer quantum gates for the same formal precision. We start by showing that RIIM can allow for ZNE to be deployed on deeper circuits than FIIM but requires many more measurements to achieve the same level of statistical uncertainty. We develop two extensions to FIIM and RIIM. The list identity insertion method allows us to mitigate the error from certain controlled-not (cnot) gates, typically those with the largest error. The set identity insertion method naturally interpolates between the measurement-efficient FIIM and the gate-efficient RIIM, allowing us to trade off fewer cnot gates for more measurements. Finally, we investigate a way to boost the number of measurements, namely, to run ZNE in parallel, utilizing as many quantum devices as are available. We explore the performance of RIIM in a parallel setting where there is a nontrivial spread in noise across sets of qubits within or across quantum computers.
Zero-noise extrapolation (ZNE) is a widely used quantum error mitigation technique that artificially amplifies circuit noise and then extrapolates the results to the noise-free circuit. A common ZNE approach is Richardson extrapolation, which relies on polynomial interpolation. Despite its simplicity, efficient implementations of Richardson extrapolation face several challenges, including approximation errors from the non-polynomial behavior of noise channels, overfitting due to polynomial interpolation, and exponentially amplified measurement noise. This paper provides a comprehensive analysis of these challenges, presenting bias and variance bounds that quantify approximation errors. Additionally, for any precision ε , our results offer an estimate of the necessary sample complexity. We further extend the analysis to polynomial least squares-based extrapolation, which mitigates measurement noise and avoids overfitting. Finally, we propose a strategy for simultaneously mitigating circuit and algorithmic errors in the Trotter-Suzuki algorithm by jointly scaling the time step size and the noise level. This strategy provides a practical tool to enhance the reliability of near-term quantum computations. We support our theoretical findings with numerical experiments.
In the current era of noisy quantum computers the reduction or correction of noise is one of the most important factors in achieving quantum supremacy. Zero-noise extrapolation (ZNE) uses noise amplification to imitate results with higher noise rates, which are then used to extrapolate a result with zero noise. In this work, we provide an intuitive explanation for ZNE by analogy of archery in windy conditions. We show how gate repetition can be used effectively for noise amplification. This is hardware- and platform-agnostic as it requires only gate-level control. We then show how machine learning may be combined with gate repetition to achieve ZNE. We define a class of quantum circuits, called deterministic, for which this method works. We compare the performance of neural networks with other extrapolation methods. Our technique is easy to implement and likely to scale well for large quantum systems.
We present a simple, malleable and low-overhead approach for improving generic biased quantum error mitigation (QEM) methods, achieving up to 15% fidelity improvements over standard QEM on 100-qubit circuits with up to 2000 entangling gates. We do so by constructing verifiable benchmark circuits which mirror the application circuit's native-gate structure and thus noise profile. These circuits can be used to benchmark and mitigate the bias of the underlying error mitigation method, requiring only the application circuit and hardware native gate set. We present two methods for generating benchmark circuits; one is agnostic to the target hardware at the expense of a small overhead of single-qubit gates, while the other is specific to the IBM superconducting hardware and has no gate overhead. As a corollary, we introduce benchmarked-noise zero-noise extrapolation (bnZNE) as a simple adaptation of zero-noise extrapolation (ZNE), one of the most popular error mitigation methods. We consider as an example the bias-mitigated ZNE and bnZNE of Trotterized Hamiltonian simulations, observing that our approaches outperform standard ZNE using both small-scale classical simulations and 100-qubit utility-scale experiments on the IBM superconducting hardware. We consider the measurement of both single-site observables as well as two-site correlations along a one-dimensional qubit chain. We also provide a software package for implementing the error mitigation techniques used in this research.
Abstract The practical application of Noisy Intermediate-Scale Quantum (NISQ) hardware is fundamentally limited by gate-level noise, which corrupts computational results. This research addresses this challenge through the development and validation of a modular software framework for Quantum Error Mitigation (QEM). We implement and compare two leading QEM strategies: Zero-Noise Extrapolation (ZNE) and Probabilistic Error Cancellation (PEC). The framework is built using the Qiskit library and is validated using a realistic, hardware-calibrated noisy simulator that mimics the error characteristics of a real IBM Quantum device. Our methodology focuses on a robust implementation of ZNE via unitary folding and a proof-of-concept demonstration of the PEC algorithm. The framework's effectiveness is demonstrated on a simulated noisy backend where, for a 3-qubit Greenberger-Horne-Zeilinger (GHZ) state, the baseline state fidelity was increased from 93.5% to 97.3% via ZNE, corresponding to a 59% reduction in the state's infidelity. This work provides a practical demonstration of how software-based error mitigation can enhance the reliability of quantum computations on current noisy hardware.