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arXiv:1808.10347 · Physical Review Applied

Determining Interface Dielectric Losses in Superconducting Coplanar-Waveguide Resonators

Wayne H. Woods, Greg Calusine, Alexander J. Melville, A. Sevi, Evan B. Golden, David K. Kim, Danna Rosenberg, Jonilyn Yoder, William D. Oliver

Published Jul 8, 2019• 167 citations
arXivHTMLPDF

Abstract

Superconducting quantum circuits are a leading candidate technology for large-scale quantum computing and simulation. Future scaling and improvements in device performance hinge upon a more detailed understanding of the sources of dielectric loss in these systems, yet standard techniques cannot separate the contributions from distinct dielectric regions to the aggregate device performance. This study presents a method for assessing the separate loss contributions from each material interface and bulk dielectric within such a circuit, enabling targeted improvements in performance by both informing device design and providing feedback to assess microfabrication techniques.

DOI
10.1103/physrevapplied.12.014012

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Superconducting quantum circuits are a leading candidate technology for large-scale quantum computing and simulation. Future scaling and improvements in device performance hinge upon a more detailed understanding of the sources of dielectric loss in these systems, yet standard techniques cannot separate the contributions from distinct dielectric regions to the aggregate device performance. This study presents a method for assessing the separate loss contributions from each material interface and bulk dielectric within such a circuit, enabling targeted improvements in performance by both informing device design and providing feedback to assess microfabrication techniques.
© 2019 American Physical Society. Superconducting quantum-computing architectures comprise resonators and qubits that experience energy loss due to two-level systems (TLSs) in bulk and interfacial dielectrics. An understanding of these losses is critical to improving performance in superconducting circuits. In this work, we present a method for quantifying the TLS losses of different bulk and interfacial dielectrics present in superconducting coplanar-waveguide (CPW) resonators. By combining statistical characterization of sets of specifically designed CPW resonators on isotropically etched silicon substrates with detailed electromagnetic modeling, we determine the separate loss contributions from individual material interfaces and bulk dielectrics. This technique for analyzing interfacial TLS losses can be used to guide targeted improvements to qubits, resonators, and their superconducting fabrication processes.
Superconducting coplanar-waveguide (CPW) resonators are one of the key devices in circuit quantum electrodynamics (cQED). Their performance can be limited by dielectric losses in the substrate and in the material interfaces. Reliable modeling is required to aid in the design of low-loss CPW structures for cQED. We analyze the geometric dependence of the dielectric losses in CPW structures using finite-element modeling of the participation ratios of the lossy regions. In a practical scenario, uncertainties in the the dielectric constants and loss tangents of these regions introduce uncertainties in the theoretically predicted participation ratios. We present a method for combining loss simulations with measurements of two-level-system-limited quality factors and resonance frequencies of CPW resonators. Namely, we solve an inverse problem to find model parameters producing the measured values. High quality factors are obtainable by properly designing the cross-sectional geometries of the CPW structures, but more accurate modeling and design methods for low-loss CPW resonators are called for major future improvements. Our nonlinear optimization methodology for solving the aforementioned inverse problem is a step in this direction.
Superconducting quantum computing systems, including coplanar waveguide (CPW) resonators and qubits, are highly susceptible to energy dissipation from two-level systems (TLS) within bulk and interfacial dielectrics. CPW resonators serve as an ideal platform for characterizing these material losses at the single-photon excitation level. Building on recent experimental evidence that interface engineering can mitigate TLS losses, this study employs simulations to evaluate resonator quality factors across various interface modifications. Our results demonstrate that reducing losses at the substrate–air (SA) interface can increase the internal quality factor Qi by up to three orders of magnitude. While etching the SA interface also enhances Qi, material loss remains the dominant dissipation mechanism. Furthermore, we find that other lossy interfaces have a significantly smaller impact on the quality factor compared to the SA interface. These simulation results align with established experimental findings, providing a robust framework for refining resonator design. This work offers precise guidelines for TLS mitigation, essential for enhancing coherence times and developing more reliable superconducting quantum processors.
Lossy dielectrics are a significant source of decoherence in superconducting quantum circuits. In this report, we model and compare the dielectric loss in bulk and interfacial dielectrics in titanium nitride (TiN) and aluminum (Al) superconducting coplanar waveguide resonators. We fabricate isotropically trenched resonators to produce a series of device geometries that accentuate a specific dielectric region's contribution to the resonator quality factor. While each dielectric region contributes significantly to loss in TiN devices, the metal–air interface dominates the loss in the Al devices. Furthermore, we evaluate the quality factor of each TiN resonator geometry with and without a post-process hydrofluoric etch and find that it reduced losses from the substrate–air interface, thereby improving the quality factor.
© 2020 Author(s). Lossy dielectrics are a significant source of decoherence in superconducting quantum circuits. In this report, we model and compare the dielectric loss in bulk and interfacial dielectrics in titanium nitride (TiN) and aluminum (Al) superconducting coplanar waveguide resonators. We fabricate isotropically trenched resonators to produce a series of device geometries that accentuate a specific dielectric region's contribution to the resonator quality factor. While each dielectric region contributes significantly to loss in TiN devices, the metal-air interface dominates the loss in the Al devices. Furthermore, we evaluate the quality factor of each TiN resonator geometry with and without a post-process hydrofluoric etch and find that it reduced losses from the substrate-air interface, thereby improving the quality factor.
Improving the performance of superconducting qubits and resonators generally results from a combination of materials and fabrication process improvements and design modifications that reduce device sensitivity to residual losses. One instance of this approach is to use trenching into the device substrate in combination with superconductors and dielectrics with low intrinsic losses to improve quality factors and coherence times. Here, we demonstrate titanium nitride coplanar waveguide resonators with mean quality factors exceeding two million and controlled trenching reaching 2.2 μm in the silicon substrate. Additionally, we measure sets of resonators with a range of sizes and trench depths and compare these results with finite-element simulations to demonstrate quantitative agreement with a model of interface dielectric loss. We then apply this analysis to determine the extent to which trenching can improve resonator performance.