RydbergPhaseDepthQA investigates whether a finite-size witness of the recently established quantum circuit-depth hierarchy mechanism remains experimentally distinguishable after provider compilation and noisy execution on a real quantum processor. The experiment compares a frozen exact (C^7Z) phase-witness circuit with a matched ablation obtained by removing exactly one pre-provider QIS two-qubit layer. The exact circuit has 36 CX gates and two-qubit depth 27, while the ablated circuit has 35 CX gates and depth 26. Hardware execution was performed on IonQ Forte-1 through the Open Quantum platform. An independent confirmatory campaign comprised three exact runs, three matched depth-minus-one runs, and one identity control, with 499 shots per job. The exact implementation achieved a success probability of 0.995992 (95% CI [0.992652, 0.998664]), compared with 0.000668 (95% CI [0, 0.002004]) for the depth-minus-one ablation. The exact-minus-ablation separation was 0.995324, with a 95% lower confidence bound of 0.991316. The identity false-positive probability was 0.002004 (95% CI [0, 0.006012]). All four frozen confirmatory statistical criteria passed, yielding RPDQA_FULL_PASS = True. These results provide a positive finite-size hardware witness of the multi-controlled-phase depth-hierarchy mechanism: for the tested (C^7Z) construction, the experimentally observed separation survives the full path from frozen QIS circuits through provider compilation to noisy QPU execution. The result does not constitute an experimental proof of the complete theoretical (d >= 12) hierarchy, nor does it claim that the final provider-native or pulse-level schedules preserve an exactly one-layer depth difference. The repository includes the frozen circuits, raw hardware results, analysis code, integrity hashes, and reproducibility tools: https://github.com/malikberrada/RydbergPhaseDepthQA
RydbergPhaseDepthQA investigates whether a finite-size witness of the recently established quantum circuit-depth hierarchy mechanism remains experimentally distinguishable after provider compilation and noisy execution on a real quantum processor. The experiment compares a frozen exact (C^7Z) phase-witness circuit with a matched ablation obtained by removing exactly one pre-provider QIS two-qubit layer. The exact circuit has 36 CX gates and two-qubit depth 27, while the ablated circuit has 35 CX gates and depth 26. Hardware execution was performed on IonQ Forte-1 through the Open Quantum platform. An independent confirmatory campaign comprised three exact runs, three matched depth-minus-one runs, and one identity control, with 499 shots per job. The exact implementation achieved a success probability of 0.995992 (95% CI [0.992652, 0.998664]), compared with 0.000668 (95% CI [0, 0.002004]) for the depth-minus-one ablation. The exact-minus-ablation separation was 0.995324, with a 95% lower confidence bound of 0.991316. The identity false-positive probability was 0.002004 (95% CI [0, 0.006012]). All four frozen confirmatory statistical criteria passed, yielding RPDQA_FULL_PASS = True. These results provide a positive finite-size hardware witness of the multi-controlled-phase depth-hierarchy mechanism: for the tested (C^7Z) construction, the experimentally observed separation survives the full path from frozen QIS circuits through provider compilation to noisy QPU execution. The result does not constitute an experimental proof of the complete theoretical (d >= 12) hierarchy, nor does it claim that the final provider-native or pulse-level schedules preserve an exactly one-layer depth difference. The repository includes the frozen circuits, raw hardware results, analysis code, integrity hashes, and reproducibility tools: https://github.com/malikberrada/RydbergPhaseDepthQA
H. Billah and M.M.H. Sarker contributed equally to this work. Interpreting a fixed quantum circuit's output as evidence of a hardware effect requires ruling out two things usually conflated with it: finite-sample fluctuation, and structure already present in the circuit's own noiseless output. Less commonly checked is a third: whether the reference circuit compared against is the one actually executed, once compiler-level qubit routing is accounted for. We execute a fixed 35-qubit, 243-gate diagnostic circuit on IBM Heron-family hardware (three runs, two backends) and show this third check is essential: the routed circuit submitted to hardware has different noiseless predictions than the logical circuit intended, for several qubits. Against the correct, routed-circuit reference, the aggregate deviation is significant in two of three runs, and four registers (0, 9, 14, 27) show a significant output-probability deviation in every run — though we distinguish a high-confidence subset, {0, 9, 27}, with tightly time-matched calibration, from qubit 14, included only on an exploratory basis given its calibration was retrieved roughly two weeks post-execution. Same-backend replicates correlate more strongly by the Pearson measure, though a rank-based (Spearman) test shows this gap does not survive at the level of register ordering, indicating substantial leverage from a small number of registers rather than a broadly robust pattern; these three executions also share a byte-identical payload and are not independent replications in the strictest sense. The mechanism is only partially resolved: independent single-qubit readout error and raw gate count are ruled out as complete explanations for most of these registers, but the simplest version of the leading hypothesis for the single most-affected register does not reproduce the observed cross-backend pattern even with live, backend-specific timing data. A second, structurally different circuit validated only in simulation calibrates the statistical procedure's behavior under one synthetic noise model; it does not itself establish generality to real hardware, and the specific register set found here should not be expected to generalize beyond this study. Note on scope: this is a methodology and case-study contribution centered on executed-circuit references for fixed-circuit diagnostics, not a characterization of IBM Heron hardware in general or a randomized-benchmarking experiment in the formal sense. Supporting data, the routed OpenQASM circuits, raw measurement counts, and analysis code for this study are available on request from the corresponding author. Affiliation: Sonicium Quantum Lab Ltd., Dhaka, Bangladesh.
We present an analysis of quantum circuit fidelity across the full compilation stack, from high-level gate optimization through pulse-level control. We connect a C++ circuit optimizer to a per-gate Lindblad master-equation fidelity model whose decoherence channels are cross-validated against qiskit-dynamics and whose absolute predictions are benchmarked against execution on real hardware. Across a campaign of 4,452 experiment runs over 371 benchmark circuits, gate cancellation provides the dominant improvement (d=1.66, 72% of circuits improved), while circuit size and pulse duration are the strongest negative predictors of process fidelity (input gates r=−0.78; pulse duration r=−0.73, R2=0.53). A formal ablation study shows that pass ordering has no significant effect on two-qubit gate reduction (Kruskal--Wallis p=0.302). Comparing against Qiskit transpilation levels, we show that two-qubit gate count, not total gate count, is the hardware-relevant metric: our optimizer attains superior two-qubit reduction on structured circuits (87.8% on QFT, 100% on QAOA) whereas Qiskit's larger total-gate reduction is dominated by single-qubit (u3) consolidation. Finally, executing eight circuits on the IQM Resonance Garnet processor (8/8 jobs completed, job identifiers released) reveals that the model is a consistent upper bound: it preserves the relative difficulty ordering of circuits but overestimates absolute fidelity by a mean of 0.49, quantifying the error budget (crosstalk, leakage, readout) outside a T1/T2/depolarizing model. We release the framework, data, and scripts as open source.
We report a pre-registered benchmark of an entanglement-forged H4 ground-state calculation on IonQ Forte Enterprise 1, a live trapped-ion processor. The analysis was frozen and publicly committed before any hardware data existed. The experiment comprised one submission of 81 new circuits at 1,100 shots per circuit, with device debiasing disabled. A three-parameter analytic noise model, fixed in advance, predicted the uncorrected energy error to within approximately 1%: 23.84 kcal/mol measured versus 24.06 kcal/mol predicted. However, the frame-free corrected estimator returned an error of 3.46 kcal/mol, compared with 0.83 kcal/mol predicted. This missed the conventional chemical-accuracy threshold of 1 kcal/mol. The shot-noise-weighted chi-square per degree of freedom increased from approximately 2 in simulator rehearsals to 5.93 on hardware. Analysis of 732 residuals identified elevated discrepancies in strongly corrected, high-weight XY-type observables and a systematic offset in one measurement group. A subsequent correction-magnitude refit showed that improving the goodness-of-fit statistic did not necessarily improve energy accuracy. These results demonstrate that a noise model that predicts uncorrected hardware behaviour accurately may still fail to predict the performance of the correction built from it. The paper reports the pre-registered experimental design, hardware results, residual diagnostics, follow-up tests, and methodological limitations. This work is not a blind variational ground-state search. The exact-state dependencies of the shared-frame estimator are disclosed, and the results do not establish reliable chemical accuracy for the frame-free estimator. Code and data repository: https://github.com/Venkatallu11/quantum-chemistry-vqe
Note: description expanded on 2026-10-14 for readability. It adds no new predictions or criteria. The frozen pre-registration is the attached PDF, unchanged since publication. Status: the experiment was run on 2026-10-14, after this record was published. Results, including every pre-registered test, will be reported in a separate record linked here. In plain language Theory says a quantum system never completely forgets where it started, even when its dynamics are chaotic. This leftover memory is called a quantum birthmark (Graf et al., Phys. Rev. X, 2026). Theory also says the birthmark should be larger when the system's rules run the same forwards and backwards in time (time-reversal symmetry) than when that symmetry is broken. This record pre-registers a test of that prediction on IBM's ibm_kingston quantum processor. We built two nearly identical sets of 4-qubit circuits. One set has time-reversal symmetry and the other does not. Both use exactly the same gates, so they experience the same hardware noise. We measure how often each circuit returns to its starting state, compared with the 1-in-16 chance level, and predict that the symmetric set shows about 1.67× more memory than the broken set. All predictions, pass/fail criteria, circuits and analysis code were deposited here before any quantum hardware was used. What is tested, and what is not Tested: whether the return probability stays above the ergodic baseline 1/16 at depths 8–23, and whether that excess is larger for the time-reversal-symmetric class by the ratio exact numerics predict for these fixed instances. Not tested: the withdrawn temporal-memory claims of 10.5281/zenodo.20470129. The birthmark is closed-system coherent memory, which measurement and reset erase, so no outcome here bears on those claims. Not tested: the universal random-matrix value 1.889. At this size (N = 16) the circuit family itself gives about 1.66, so a finite-size difference is expected. Not a quantum-advantage claim: a 16-dimensional system is exactly simulable. This is a hardware-validation experiment. Design Hardware: ibm_kingston, physical qubits 108–109–118–129 as an open chain, selected by a no-QPU calibration audit (included as v6_backend_audit.zip). Circuits: a kicked-Ising Floquet period Kx(a/2) → D(h1) → Kx(b) → D(h2) → Kx(a/2), with D(h) = exp(−iΣhiZi)·exp(−iπ/4 ΣZiZj), at exactly 6 CZ per period. COE (symmetric): h1 = h2. TRSB (broken): h1 = h + d, h2 = h − d. The classes differ only in virtual-Z angles. Instances: 16 seeded COE/TRSB pairs (seed 20261013), run at every depth from 8 to 23 (48–138 CZ). Observable: P(t) = |⟨0000|Ft|0000⟩|². The primary statistic is the readout-mitigated excess ratio R = ECOE / ETRSB, where E is the mean of P(t) − 1/16. A noise fidelity common to both classes cancels in R. Controls: 32 deep circuits (depths 60–63) as a decoherence-floor check. 8 state-preparation monitors. 16 readout-calibration circuits. Run: one SamplerV2 job of 568 circuits at 256 shots each, with dynamical decoupling and twirling off and the execution order shuffled. Predictions Quantity COE TRSB R Excess over 1/16, depths 8–23 (noiseless, primary) 0.0896 0.0537 1.667 Same instances, infinite-time limit 0.0952 0.0634 1.502 Circuit family, 10,000 random draws — — 1.661 Random-matrix reference, N = 16 — — 1.889 Under four simulated noise models (nominal, pessimistic, and each with coherent errors), the mitigated R stays between 1.64 and 1.77. The shot-noise standard deviation of R at 256 shots is 0.070–0.125. Pre-registered decision criteria Test Pass condition H1 (primary): symmetry dependence 99% CI lower bound of R > 1.0 H2 (primary): quantitative agreement 99% CI of R intersects 1.54–1.87 and is at most 1.0 wide S1: birthmark above decohered floor Window excess minus depth 60–63 excess, 99% CI lower bound > 0, for both classes S2: matched fidelity between classes 0.85 ≤ FCOE/FTRSB ≤ 1.15 S3: instance-level agreement Pearson r ≥ 0.80 against exact predictions S4 (flag only): state prep and drift Monitors ≥ 0.95, drift ≤ 0.045 Overall verdict: CONFIRMED if H1, H2 and S2 all pass; PARTIAL if H1 passes but H2 or S2 fails; NOT CONFIRMED if H1 fails. Every test is reported whatever the outcome. Uncertainty comes from a 10,000-sample parametric multinomial bootstrap over every circuit's counts, with instances held fixed. Amendment 1 (v1.1.0, made before any data) Amendment 1 changed two things relative to v1.0.0 (10.5281/zenodo.23355804): Shots: reduced from 1024 to 256 per circuit for QPU budget, cutting estimated execution from about 152 s to about 38 s. H2: changed from "point estimate in 1.54–1.87" to the CI rule above, because at 256 shots the point rule would falsely fail 20–25% of the time under the pessimistic models. A CI-width cap of 1.0 keeps H2 informative. Circuits, instances and predictions are unchanged. The trade-off is that H2 is now a weaker test. Provenance Every reported number is derived by script from raw counts: Source and transpiled circuits are saved as QPY. Before submission, every transpiled circuit is mapped back to 4 qubits and its unitary checked against the exact model to < 10−8. The analysis reads its decision bands only from predictions.json and its data only from the raw results file. Submission is gated on the DOI of this record. Files: The PDF is the authoritative pre-registration. predictions.json holds every predicted number and decision band. birthmark_prereg_v1.1.0.zip contains the circuit builder, verification, submission and frozen analysis scripts, plus simulated-data self-tests. v6_backend_audit.zip is the pre-submission calibration audit. Known limitations Small system size (N = 16), so the random-matrix value is not expected. The prediction is specific to depths 8–23 and to these 16 fixed instances. The noise models exclude leakage, TLS fluctuations and crosstalk from outside the chain. T1 relaxation biases P(0000) upward, which pulls R toward 1 (conservative). One backend, one path, one job: no replication. Data: CC BY 4.0. Code: MIT. Principal investigator: Amit Brahmbhatt, Quantum-Clarity LLC.
Quantum Polycontextural Computing (QPC) is a hardware-agnostic orchestration layer that maps multiple labelled problem contexts onto one gate-model execution on commercial superconducting QPUs. We report three auditable hardware studies on IBM Heron (ibm_fez, ibm_marrakesh) under the IBM Open plan, each with published job identifiers and JSON artifacts: (i) a 46-qubit mastoparan-I folding pilot compared to a published trapped-ion BF-DCQO energy reference (−8.70); QPC Tier-D repair reaches −9.74 in one pass with eight recoverable job IDs; (ii) a controlled K-ablation on 16 qubits where polycontextural K=4 fits held-out Wang–Busemeyer joint statistics better than a matched K=1 control (bootstrap one-sided p<0.0005 on total-variation and KL); (iii) thirteen Runtime jobs demonstrating co-resident multi-context layouts from 4×39Q through 24 contexts in six cluster submissions. A supplementary transjunction ON vs OFF ablation at 3×26Q shows bridge-local inter-context correlators increase by |Δ|>0.05 when ring coupling is enabled, after QPC readout mitigation on bridge qubits only; full-width correlators do not separate conditions. We state limitations explicitly: QPC is not a new QPU; protein and cognition results are selective comparisons, not universal advantage claims; open-instance entropy alone does not signature the architecture.
Preprint; not peer reviewed. We report a hardware-oriented quantum sampling experiment motivated by Hidden Code Sampling (HCS), while explicitly not claiming an end-to-end implementation of the original HCS PeakVerification–SyndromeVerification protocol. A full-width 60-qubit circuit derived from a sparse trivariate-bicycle CSS construction was embedded without swaps on a 108-qubit superconducting processor and compiled to native RX, RZ, and controlled-Z operations. The base circuit contains 180 logical two-qubit rotations and 360 native controlled-Z gates. Local unitary folding produced stress instances with factors 1, 3, and 5, containing respectively 360, 1080, and 1800 controlled-Z gates. A pilot run was used only to identify and freeze an endian-corrected two-feature local parity witness. The confirmatory dataset consists of three completed QPU executions at folding factors 1, 3, and 5. The final analysis includes only execution records whose frozen QASM identities and authorization hashes match the preregistered confirmatory panel. Each science circuit received 10,000 shots, and each of four calibration patterns received 4,000 shots in both the pre- and post-experiment calibration periods. Simultaneous finite-shot lower confidence bounds combine Clopper–Pearson calibration intervals, a pre/post drift hull, inverse assignment-channel correction, an empirical Bernstein bound, and worst-case optimization over the calibration box. The certified margins are 0.2953, 0.2858, and 0.3148 at folding factors 1, 3, and 5, respectively. All three folds pass, and the maximum calibration-parameter drift is 0.0065. Within a preregistered classical attack suite, the conditional operation-count gap is γ = 6.555, above the registered target of 6.0. This result is an operation-count certificate relative to the registered classical attacks. It is not a wall-clock quantum advantage claim, not a full-distribution total-variation certificate, and not an experimental implementation of the exact HCS protocol. Quantum circuits were submitted to the Rigetti Cepheus-1-108Q superconducting processor through the Open Quantum platform, operated by Quantum Rings, using the Open Quantum Python SDK. This acknowledgment does not imply endorsement by Quantum Rings of the findings, interpretations, or conclusions reported in this work. The deposited files include the preprint, LaTeX sources, sanitized confirmatory QASM files, aggregate certificate metrics, integrity manifests, and publication-compliance documentation. Authentication credentials, account metadata, organization identifiers, provider job identifiers, private provider records, and the private audit archive are excluded.