Scientific efforts and financial investments in quantum computers have increased in recent years, with superconducting architectures as one of the most promising platforms. To reach the true potential of quantum computers, the current systems need to be significantly scaled up. Current methods of superconducting qubit readout require routing between room-temperature electronics and the qubit which is operated in cryogenic conditions. When systems that use this approach are scaled up, problems arise; the numerous cables required for the routing to room temperature electronics become even more problematic as the system size increases. This method also suffers from increased measurement feedback latency which is worsened further by the scale-up. A novel architecture of on-chip qubit readout that addresses both of these problems is proposed by the Quantum Computing and Devices (QCD) group. The proposition involves a sensitive calorimeter which measures the qubit state. This measurement manifests as a change in the calorimeter frequency which can be further sensed by a probe-signal and encoded into the phase value of the reflected signal. To analyse the qubit state and determine the next action, the signal is required to be transferred to a control unit which determines the feedback to other microwave components. This requires digitisation of the reflected phase value. The method of digitisation that is proposed in the architecture utilises the Josephson digital phase detector (JDPD) which is a superconducting quantum circuit device that is also placed on chip. The JDPD is able to effectively digitise the phase value of an input signal owing to its non-linear potential, the configuration of which can be switched on command. However, the power of the reflected signal is extremely low which negatively affects the sensitivity of the JDPD and leads to higher detection error. The aim of this thesis is to increase the sensitivity of the JDPD with respect to low-power signals. This is achieved by optimising the critical current of the two Josephson junctions present in the system as well as the inductance of the central inductor. Successful optimisation makes the device more compatible with the proposed calorimetric qubit readout. The optimisation is conducted by simulating the system in Quantum Toolbox in Python (QuTiP) and analysing the resulting detection error. Before optimisation, the theory behind the system is discussed, and key operators are derived to later justify the parameters and assumptions that are chosen when optimising. Based on the simulations, this thesis found a low detection error space forinductance and critical current. The parameter pairs within this space yield adetection error of ∼ 41% which is an improvement from the, essentially random, baseline of ∼ 48%. The system has many free param.
Scientific efforts and financial investments in quantum computers have increased in recent years, with superconducting architectures as one of the most promising platforms. To reach the true potential of quantum computers, the current systems need to be significantly scaled up. Current methods of superconducting qubit readout require routing between room-temperature electronics and the qubit which is operated in cryogenic conditions. When systems that use this approach are scaled up, problems arise; the numerous cables required for the routing to room temperature electronics become even more problematic as the system size increases. This method also suffers from increased measurement feedback latency which is worsened further by the scale-up. A novel architecture of on-chip qubit readout that addresses both of these problems is proposed by the Quantum Computing and Devices (QCD) group. The proposition involves a sensitive calorimeter which measures the qubit state. This measurement manifests as a change in the calorimeter frequency which can be further sensed by a probe-signal and encoded into the phase value of the reflected signal. To analyse the qubit state and determine the next action, the signal is required to be transferred to a control unit which determines the feedback to other microwave components. This requires digitisation of the reflected phase value. The method of digitisation that is proposed in the architecture utilises the Josephson digital phase detector (JDPD) which is a superconducting quantum circuit device that is also placed on chip. The JDPD is able to effectively digitise the phase value of an input signal owing to its non-linear potential, the configuration of which can be switched on command. However, the power of the reflected signal is extremely low which negatively affects the sensitivity of the JDPD and leads to higher detection error. The aim of this thesis is to increase the sensitivity of the JDPD with respect to low-power signals. This is achieved by optimising the critical current of the two Josephson junctions present in the system as well as the inductance of the central inductor. Successful optimisation makes the device more compatible with the proposed calorimetric qubit readout. The optimisation is conducted by simulating the system in Quantum Toolbox in Python (QuTiP) and analysing the resulting detection error. Before optimisation, the theory behind the system is discussed, and key operators are derived to later justify the parameters and assumptions that are chosen when optimising. Based on the simulations, this thesis found a low detection error space forinductance and critical current. The parameter pairs within this space yield adetection error of ∼ 41% which is an improvement from the, essentially random, baseline of ∼ 48%. The system has many free param.
Quantum computation requires high-fidelity qubit readout, preserving the quantum state. In the case of superconducting (SC) qubits, readout is typically performed using a complex analog experimental setup operated at room temperature, which poses significant technological and economic barriers to large system scalability. An alternative approach is to perform a cryogenic on-chip qubit readout based on a Josephson Digital Phase Detector (JDPD): a flux switchable device capable of digitizing the phase sign of a coherent input. The readout operation includes the flux excitation of the JDPD to evolve from a single to a double-minima potential. In this work, the effect of the flux bias characteristics on the JDPD performances is studied numerically. To meet the identified requirements that maximize detection fidelity and tackle the engineering challenges, a cryogenic on-chip Single Flux Quantum based flux bias driver is proposed and discussed.
As superconducting quantum processors increase in size and complexity, the scalability of standard techniques for qubit control and readout becomes a limiting factor. Replacing room temperature analog components with cryogenic digital components could allow for the realization of systems well beyond the current state-of-the-art qubit arrays with tens of qubits. The standard technique for performing a qubit measurement with heterodyne readout uses a quantum-limited cryogenic amplifier chain and requires bulky microwave components inside the refrigerator with multiple control lines and pump signals. Additionally, the result is only accessible in software at room temperature. An alternative method for measuring qubits involves mapping the qubit state onto the photon occupation in a microwave cavity, followed by subsequent photon detection using a Josephson photomultiplier (JPM). The JPM measures the qubit and stores the result in a classical circulating current. To make use of this result, we can leverage existing single flux quantum (SFQ) circuitry. An underdamped Josephson transmission line (JTL) can be coupled to the JPM and fluxons traveling along the JTL are accelerated or delayed, depending on the circulating current state of the JPM. This fluxon delay can then be converted to an SFQ logic signal resulting in a digital qubit readout with a proximal microfabricated device, paving the way for cryogenic digital feedback necessary for error-correcting codes.
Abstract Scalable superconducting quantum computing systems require ultrafast and low-latency readout architectures. A Josephson phase digital detector (JDPD) converts the phase of an incoming analog microwave signal into a constant digital current state, enabling ultrafast, fully cryogenic phase discrimination. Thus, a JDPD is a critical component for scalable single-flux quantum (SFQ)-based qubit readout architectures and quantum computation. The flux bias driver (FBD) is a key element of the JDPD system, as it dynamically adjusts the detector’s operating point and enables the combined FBD-JDPD setup to function as a scalable SFQ-based qubit readout solution. Previous work has focused on detector operational and bias control, while information leakage through the shared bias infrastructure has received limited attention. Accordingly, this work investigates side-channel leakage due to the fluctuations in the bias current of an FBD-JDPD system. Extensive simulations demonstrate that phase-dependent switching events in a JDPD may cause bias current fluctuations that propagate backward through the inductively coupled bias network. When temporally aligned with the FBD set and reset operations, these fluctuations manifest as measurable perturbations on the shared bias line. The results show that the peak probabilities of 43.8 μ A for phase θ r = 0 and of 46.7 μ A for phase θ r = π appear due to the interface between the room temperature electronics and the device’s bias network. This leakage presents a serious security and privacy concern, as the shared bias network, which interfaces with electronics operating at room temperature, can serve as an easy access point for a malicious adversary.
In the quest to build a fault-tolerant quantum computer, superconducting circuits based on Josephson junctions have emerged as a leading architecture. Coherence times have increased significantly over the last two decades, and processors with ∼ 50 qubits have been experimentally demonstrated. These systems traditionally utilize microwave frequency control signals, and heterodyne based detection schemes for measurement. Both of these techniques rely heavily on room temperature microwave generators, high-bandwidth lines from room temperature to millikelvin temperatures, and bulky non-reciprocal elements such as cryogenic microwave isolators. Reliance on these elements makes it impractical to scale existing devices up a single order of magnitude, let alone the 5-6 orders of magnitude needed for performing fault-tolerant quantum algorithms. Here, I present results that suggesting superconducting digital logic, namely Single Flux Quantum (SFQ) logic, can replace analog control and measurement techniques, avoiding the significant overhead involved. I describe a scheme for measuring qubits with a device known as a Josephson Photomultiplier (JPM), which crucially stores the result of a qubit measurement in a classical circulating supercurrent within the device and allows for integration with SFQ detection circuitry. This technique is experimentally demonstrated, with single-shot measurement fidelity of 92%. Two methods for accessing this measurement result are presented, one utilizing ballistic fluxons, and another utilizing flux comparison. Initial experimental results of the latter are presented. In addition, I describe a scheme for controlling qubits with sequences of digital SFQ pulses. This method is then used to control a qubit without a microwave signal generator, with results of an average single-qubit gate fidelity of around 95%. When combined, these techniques form a nearly fully digital interface to superconducting qubits, which could allow these systems to scale much more easily.
Quantum computing promises an exponential speed-up of computation compared to what is nowadays achievable with classical computers. In this way, it enables the evaluation of more complex models and the breaching of current security algorithms. For the operation of a quantum system, many questions remain to be answered. Currently, there are several quantum technologies that promise to be both reliable and scalable, two features required for large scale quantum operations. Common to all technologies is the operating temperature that needs to be close to absolute zero, i.e. below 100 mK, to suppress environment noise and allow the quantum properties to become 'visible'. In order for any quantum processor to be operated, a so-called quantum-classical interface is required for the quantum bit (qubit) read-out and control. This interface consists of various electronic blocks, such as analog-to-digital converters, digital-to-analog converters, mixers, amplifiers and a digital controller. Especially the analog blocks require effort to meet the noise and stability constraints as not to disturb the very sensitive qubits and allow reading of the tiny signals. As the qubits live in extremely deep-cryogenic temperatures, long wires interface the cryogenic with the room temperature environment, where most of the electronics is situated. However, for a scalable system, heat injection becomes a serious problem, with many wires between 300 K and sub-Kelvin. Furthermore, such amount of interconnects is challenging to mechanically place in a dilution refrigerator. Therefore, in this work, we propose to implement the electronics not at room temperature, but at a temperature much closer to the qubits, for example at 4 K. This not only reduces significantly the wiring between room temperature and the qubits, but we can also benefit from lower electronic noise at such a temperature. The operation of conventional electronics almost 200°C below its normal temperature range is not trivial as device properties alter significantly and most circuits no longer operate as intended. In CMOS processes, the main technology in the integrated electronics world, the behaviour of the transistors, required for the implementation of any circuit, deviates considerably at low temperatures. The transistor's threshold voltage goes up, the mobility increases and the subthreshold slope becomes steeper, to name just a few of these deviations. Although there are improvements in performance, there are also some counter effects, and characterization of the transistors is needed to observe the changes. Once devices are characterized at such low temperatures, new models can be built and circuits can be simulated and adapted to operate properly at cryogenic temperatures. Luckily, there are various commercially available devices that can already withstand the chills of cold. We demonstrated various commercially available devices, such as a field-programmable gate array (FPGA) implemented in a 28 nm CMOS process, to be operating without major concerns at 4~K. Its properties alter only slightly, within 5 to 10%, and all tested circuit implementations, working at 300~K, also worked at 4 K. We combined both commercially available devices, that operate 200 K below their specified temperature range, with custom designed CMOS circuits to implement a cryogenic read-out platform for spin qubits. This system comprises amplifiers, an ADC, an FPGA, voltage regulators and a clock generator. It allows to amplify the tiny signal from the qubits and digitize it directly in the FPGA in order to process the data locally at 4~K. This system is one of the first systematic attempts at operating a part of the quantum-classical interface at cryogenic temperatures and forms the basis for future systems comprising the complete electronic interface for qubits to operate at such low temperatures. One of the main problems to tackle for cryogenic electronic systems is their power consumption. Power budgets are simply limited to roughly 1 or 2 Watts at 4 K and exponentially lower at deeper cryogenic temperatures, thus limiting the size of large-scale electronic systems. Our approach of combined commercial and custom circuits will have to be steadily replaced by a single (custom) technology that meets both power and scalability constraints. One of the best candidates is CMOS, a technology that the industry has relied upon for several decades and benefits from many optimizations thanks to Moore's law.
Quantum computing is a rapidly evolving field with potential for solving complex problems beyond the reach of classical computers. Scalability in qubit design and signal processing architecture within cryostats is necessary for taking advantage of quantum computing's potential. Current state of the art qubit technology requires both a feed and readout line for each qubit within a quantum processor, with these lines generally being metallic coaxial cables. For stainless steel cables this represents a significant heat load into the cryostat. An alternative approach involves using optical fibers for signal transmission, as optical fibers have a thermal conductivity two orders of magnitude lower than stainless steel coaxial cables. The proposed method for optical signal transmission relies on electro-optic modulation, where a voltage applied to an electro-optic material changes its refractive index, allowing for a controllable phase change to be applied to any light passing through the material. This concept can be combined with on-chip photonic waveguide technology to build fiber-coupled phase modulators as well as intensity modulators using on chip interferometers. The proposed architecture uses a room temperature intensity modulator to encode microwave signals onto a laser signal, which is recovered at cryogenic temperatures using a photodiode and used as input for a device under test. The output of the test device is encoded onto light using a phase modulator and recovered at room temperature through interferometry. Proof-of-concept experiments have been carried out at room temperature, including noise characterization and preliminary tests of components at cryogenic temperatures.