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A Lower Bound on Energy Cost per Logical-Qubit Operation in Surface-Code Quantum Error Correction

Rowan Brad Quni-Gudzinas

Published Sep 3, 2026• 0 citations
Publisher

Abstract

Surface-code quantum error correction (QEC) is pivotal for fault-tolerant quantum computing, but its energy efficiency remains underexplored. This work derives a practical lower bound on the energy cost per logical-qubit operation, accounting for gate-fidelity decay's impact on code distance and physical-qubit overhead. By modeling the energy consumption of gate operations and error correction, we express the total cost as $ E = (E_g N_g + E_c N_c)/N_l $, where $ E_g $, $ E_c $, $ N_g $, $ N_c $, and $ N_l $ represent gate and physical-qubit energy costs, gate counts, physical-qubit counts, and logical qubit counts, respectively. Gate-fidelity decay increases the required code distance $ d $, scaling $ N_c $ and thus $ E $. We propose normalizing computational cost in joules per logical-qubit operation (JPCUB), isolating logical work from error-correction overhead. Quantitative predictions for $ E_g $, $ E_c $, and $ N_c $ remain [to verify], but the functional dependence on $ d $ and gate fidelities is established. This framework informs energy-efficient QEC design and benchmarks. ## 1. Introduction Surface codes enable fault-tolerant quantum computation by encoding logical qubits in a 2D lattice of physical qubits, correcting errors through syndrome measurements. However, the energy cost per logical operation—critical for scalability—remains poorly quantified. While theoretical foundations exist (Raussendorf & Terhal, 2006; Kitaev, 2003), prior work focuses on error-correction thresholds rather than energy efficiency. Here, we address this gap by deriving a lower bound on energy cost, considering how gate-fidelity decay necessitates larger code distances $ d $, increasing physical-qubit overhead $ N_c $. This analysis connects to the joules-per-compute (JPCUB) benchmark, advocating for energy normalization per logical qubit to disentangle computational work from error-correction costs. ## 2. Background Surface codes encode logical qubits using a 2D grid of

DOI
10.5281/zenodo.22278599

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Surface-code quantum error correction (QEC) is pivotal for fault-tolerant quantum computing, but its energy efficiency remains underexplored. This work derives a practical lower bound on the energy cost per logical-qubit operation, accounting for gate-fidelity decay's impact on code distance and physical-qubit overhead. By modeling the energy consumption of gate operations and error correction, we express the total cost as E=(EgNg+EcNc)/NlE = (E_g N_g + E_c N_c)/N_lE=(Eg​Ng​+Ec​Nc​)/Nl​, where EgE_gEg​, EcE_cEc​, NgN_gNg​, NcN_cNc​, and NlN_lNl​ represent gate and physical-qubit energy costs, gate counts, physical-qubit counts, and logical qubit counts, respectively. Gate-fidelity decay increases the required code distance ddd, scaling NcN_cNc​ and thus EEE. We propose normalizing computational cost in joules per logical-qubit operation (JPCUB), isolating logical work from error-correction overhead. Quantitative predictions for EgE_gEg​, EcE_cEc​, and NcN_cNc​ remain [to verify], but the functional dependence on ddd and gate fidelities is established. This framework informs energy-efficient QEC design and benchmarks. ## 1. Introduction Surface codes enable fault-tolerant quantum computation by encoding logical qubits in a 2D lattice of physical qubits, correcting errors through syndrome measurements. However, the energy cost per logical operation—critical for scalability—remains poorly quantified. While theoretical foundations exist (Raussendorf & Terhal, 2006; Kitaev, 2003), prior work focuses on error-correction thresholds rather than energy efficiency. Here, we address this gap by deriving a lower bound on energy cost, considering how gate-fidelity decay necessitates larger code distances ddd, increasing physical-qubit overhead NcN_cNc​. This analysis connects to the joules-per-compute (JPCUB) benchmark, advocating for energy normalization per logical qubit to disentangle computational work from error-correction costs. ## 2. Background Surface codes encode logical qubits using a 2D grid of
This work explores the integration of Quantum Error Correction (QEC) techniques within energy-efficient green communication networks, emphasizing their pivotal role in achieving sustainability in next-generation Information and Communication Technology (ICT) systems. Quantum technologies, particularly error correction protocols like surface codes are indispensable for reliable quantum information processing. However, their implementation often incurs substantial energy overhead due to the extensive physical qubit resources required. This research proposes a framework for adapting scalable QEC algorithms, leveraging innovations such as reconfigurable atom arrays, to optimize energy consumption while preserving high fidelity in quantum operations. Surface codes, a cornerstone of QEC, encode logical qubits in two-dimensional lattices of physical qubits, utilizing stabilizer measurements to detect and correct bit-flip and phase-flip errors. The performance of surface codes is influenced by critical parameters such as code distance, which determines fault tolerance, and gate fidelity, which impacts logical error rates. Through a comprehensive analysis of these parameters, this work evaluates the interplay between code distance, qubit array size, and gate fidelity to highlight their collective impact on fault tolerance and computational accuracy. These insights align with global efforts to reduce the environmental footprint of emerging quantum technologies, advancing the principles of green ICT and environmentally conscious innovation.
Quantum error correction (QEC) represents a critical enabler for fault-tolerant quantum computing, protecting fragile quantum states from decoherence and operational errors. This paper provides a comprehensive analysis of leading quantum error correction schemes, focusing on surface codes and topological codes within the context of Noisy Intermediate-Scale Quantum (NISQ) era processors. We examine the theoretical foundations of stabilizer codes, compare surface code implementations with code distances ranging from d=3 to d=17, and analyze topological codes including toric codes and color codes. Our investigation encompasses syndrome extraction circuits, logical qubit encoding strategies, and threshold analysis for contemporary quantum hardware platforms. Performance metrics reveal that surface codes achieve error thresholds of approximately 1% with realistic noise models, while topological codes offer architectural advantages for specific qubit connectivity constraints. We discuss implementation challenges on current NISQ processors including IBM Quantum, Google Sycamore, and IonQ systems, addressing qubit overhead, gate fidelity requirements, and decoding algorithms. This analysis provides insights for selecting appropriate error correction schemes based on application requirements and hardware capabilities.
The planar surface code protects quantum information robustly but pays for its two-dimensional layout with an encoding rate that vanishes as the distance grows, so fault-tolerant memories require hundreds to thousands of physical qubits per logical qubit. A recent proposal constructs modular hyperbolic surface and color codes by partitioning a quantum processor into flat Euclidean modules and wiring sparse, static boundary connections between them, yielding semi-hyperbolic codes with constant encoding rate [1,4]. In this paper we provide an independent, fully explicit quantitative analysis of that proposal. Taking the reported parameters — encoding rate k/n=1/16k/n = 1/16k/n=1/16 and distance d≥22d \geq 22d≥22 — as inputs, we compute that a twelve-logical-qubit modular memory requires nmod=192n_{\mathrm{mod}} = 192nmod​=192 physical qubits, versus 111001110011100 data qubits for twelve distance-222222 rotated surface-code patches, a raw overhead reduction of 57.8×57.8\times57.8×; the reduction remains ≥30×\geq 30\times≥30× even if the true modular implementation uses up to 370370370 physical qubits. We further develop a seam-noise mixture model and compute the seam-error budget under which the modular advantage survives: with a seam fraction f=0.1443f = 0.1443f=0.1443, seam links may carry up to γ≈2.5×\gamma \approx 2.5\timesγ≈2.5× the intra-module error rate before a tenfold advantage at matched distance is exhausted. We compare against the [[288,12,18]][[288,12,18]][[288,12,18]] bivariate bicycle code (1.5×1.5\times1.5× fewer qubits for the modular code, at strictly larger distance) and situate the proposal within the low-overhead QEC landscape. All arithmetic is shown step by step; all projections are labeled with stated assumptions. ## 1. Introduction Quantum error correction (QEC) is the accepted route to fault-tolerant quantum computation, but the leading practical scheme — the planar surface code — has an encoding rate k/nk/nk/n that tends to zero as the code distance ddd grows. For a target logical error rate, the required physical-to-logical qubit ratio grows roughly quadra Full text and updates: papers.qnfo.org/papers/low-overhead-quantum-error-correction-with-boundary-connected-planar-modules-a-r/
We present the ENSEMBLE-001 pilot study, reconciling three independent analyses of the minimum energy required to operate a fault-tolerant quantum computer at the 1,000-logical-qubit scale. The physics energy floor is defined by Landauer's limit on irreversible operations, the thermodynamic cost of error syndrome extraction, and the minimum overhead for magic-state distillation of non-Clifford gates. Our reconciled analysis finds that this physics floor lies 10^16–10^18 below current practical energy projections. The three independent writer legs converge on this headline figure but diverge on three methodological points: the logical-operation convention, the wall-power midpoint assumption, and the direction of the efficiency parameter η. We find a wall-power midpoint of 10–100 kW for sustained operation. The spread in the energy floor is primarily attributable to the choice of logical-op convention rather than physical disagreement. We conclude by identifying open questions regarding the applicability of the Landauer bound to reversible syndrome extraction and the scaling of these uncertainties to the 10,000-logical-qubit scale. ## 1. Introduction Fault-tolerant quantum computing (FTQC) relies on quantum error correction to protect logical qubits from physical noise. As architectures scale toward 1,000 logical qubits, the energy required for sustained operation becomes a critical bottleneck. This preprint details the ENSEMBLE-001 pilot study, which reconciles three independent analyses (writer legs a, b, and c) of the energy floor for FTQC at this scale. We define the energy floor as the minimum thermodynamic and computational energy required, assuming idealized physical components. We compare this floor to current practical resource estimates and track the provenance of divergences across the three independent analyses. ## 2. Background FTQC encodes logical qubits into many physical qubits using stabilizer codes, most notably the surface code [1]. To perform uni
Current quantum processors are fragile, noisy and fairly limited in both quantity and quality with tens of qubits and physical error rates of around 10^-3. To realize practical quantum applications, however, error rates need to be below 10^-15 across millions of qubits. To bridge this gap and fully harness the potential of quantum computers, quantum error correction (QEC) is essential. QEC codes are designed to protect quantum information by redundantly encoding it onto multiple physical qubits. This encoding allows for the detection and correction of local errors affecting individual qubits, e.g., through stabilizer measurements. Importantly, if the physical error rates are below a specific threshold, QEC codes can exponentially suppress logical error rates by increasing the number of physical qubits involved. This is essential for achieving fault-tolerant computations, which are key to unlocking the full potential of quantum computers. The work presented in this thesis focuses on the implementation and optimization of small-scale QEC experiments using the surface code and flux-tunable superconducting qubits (Transmons). It addresses several key challenges: enhancing two-qubit gate fidelity in Surface-4 (Chapter 2), implementing an error-detection code with Surface-7 (Chapter 3), automating the calibration and benchmarking of the building blocks in Surface-17 (Chapter 4), reducing leakage into higher excited states with leakage reduction units (Chapter 5), assessing and enhancing the performance of logical qubits (Chapters 7 and 8).
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit. We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.