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IEEE International Conference on Electronics, Communications and Intelligent Science (ECIS)

The Weighted Information Storage Bit-Flipping Decoder for Generalized LDPC Codes

Haobin Xu, Zhongfeng Wang, Suwen Song

Published May 22, 2026• 0 citations
Publisher
DOI
10.1109/ecis69634.2026.11604348

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Low-density parity-check (LDPC) codes with column weight-4 are widely used in many commu-nication and storage systems. However, traditional hard decision decoding algorithms such as the bit-flipping (BF) algorithm suffer from error floor due to trapping sets in LDPC codes. In this paper, to lower error floor of the BF algorithm over the Binary Symmetric Channel (BSC), we design a set of decoding rules incorporated within the BF algorithm for column weight-4 LDPC codes. Given a column weight-4 LDPC code, the dominate error patterns of the BF algorithm are first specified, and according to the designed rules, additional bits at both variable nodes (VN) and check nodes (CN) provide more information for the BF algorithm to identify the dominate error patterns, so that the BF algorithm could deliberately flip some bits to break them. Simulation results show that the modified BF algorithm eliminates all 4-error patterns and lowers the Bit Error Rate (BER) for at least two orders of magnitude with a trivial increment of complexity.
At present, various communication and storage systems have put forward high requirements on both the complexity and performance of low-density parity-check (LDPC) decoders. Bit flipping decoders are a good candidate for these applications. This letter proposes to utilize the column layered scheduling to speed up the convergence and improve the error correcting performance of existing bit flipping algorithms. As the information storage bit flipping (ISBF) algorithm generally performs the best, we investigate the layered ISBF (LISBF) algorithm in detail, including developing two efficient techniques for optimizing the computation of flipping thresholds: forward-backward computation and two-max computation. Simulation results on a (3, 6) LDPC code show that, compared to the ISBF algorithm, the LISBF algorithm can reduce the frame error rate by up to an order and reduce the average number of iterations by around 40%.