This record contains the Madmartigan 96-Active-Qubit Structured-Output Benchmark package developed under the Quantum State Command Encoding (QSCE) research program. The benchmark documents the progression from an original 16-qubit Madmartigan structured-output circuit into a controlled 96-active-qubit, six-tile NISQ benchmark executed on IBM superconducting quantum hardware. The objective was not merely to increase qubit count, but to test whether a designed quantum circuit could preserve a reference-specific structured-output band across multiple physical tile regions under real hardware constraints. The final benchmark package includes execution on IBM Marrakesh using 96 active qubits, 156 measured qubits, six simultaneous 16-qubit tiles, 4096 shots per run, no quantum error correction, and no post-selection. The primary GLOBALPACK T6 rank-2 layout is accompanied by calibration-aware 64-active-qubit replication results, multi-seed robustness testing, an 831-depth 96-active-qubit stress layout, same-layout generic RCS controls, phase-scrambled architecture-adjacent controls, and partial-entanglement ablation analysis. The central finding is that the Madmartigan circuit preserved repeatable, reference-specific structured-output behavior across tiled hardware execution, while same-layout generic RCS controls and phase-scrambled controls failed to reproduce the Madmartigan reference band. The package includes statistical raw-versus-control separation, physical tile-map visualizations, and reproducibility artifacts to support independent technical review. Included materials may include some or all of the following: benchmark report, QASM3 circuit exports, QPY circuit artifacts, raw hardware counts, metadata, analysis CSVs, physical tile maps, scanner outputs, statistical comparison files, figures, and supporting run scripts. These artifacts are provided to support auditability, reproducibility review, and continued evaluation of QSCE/Madmartigan structured-output preservation as a potential near-term NISQ utility pathway. This work is positioned as a structured-output preservation benchmark rather than a universal quantum advantage claim. Its relevance lies in testing whether quantum hardware output can be engineered into stable, classifiable, reference-specific signal bands that may support future quantum-to-classical handoff, signaling, authentication, command validation, and cyber-hardening primitives. Reproducibility package available upon request at frank@quantummidiposse.com
This record contains the Madmartigan 96-Active-Qubit Structured-Output Benchmark package developed under the Quantum State Command Encoding (QSCE) research program. The benchmark documents the progression from an original 16-qubit Madmartigan structured-output circuit into a controlled 96-active-qubit, six-tile NISQ benchmark executed on IBM superconducting quantum hardware. The objective was not merely to increase qubit count, but to test whether a designed quantum circuit could preserve a reference-specific structured-output band across multiple physical tile regions under real hardware constraints. The final benchmark package includes execution on IBM Marrakesh using 96 active qubits, 156 measured qubits, six simultaneous 16-qubit tiles, 4096 shots per run, no quantum error correction, and no post-selection. The primary GLOBALPACK T6 rank-2 layout is accompanied by calibration-aware 64-active-qubit replication results, multi-seed robustness testing, an 831-depth 96-active-qubit stress layout, same-layout generic RCS controls, phase-scrambled architecture-adjacent controls, and partial-entanglement ablation analysis. The central finding is that the Madmartigan circuit preserved repeatable, reference-specific structured-output behavior across tiled hardware execution, while same-layout generic RCS controls and phase-scrambled controls failed to reproduce the Madmartigan reference band. The package includes statistical raw-versus-control separation, physical tile-map visualizations, and reproducibility artifacts to support independent technical review. Included materials may include some or all of the following: benchmark report, QASM3 circuit exports, QPY circuit artifacts, raw hardware counts, metadata, analysis CSVs, physical tile maps, scanner outputs, statistical comparison files, figures, and supporting run scripts. These artifacts are provided to support auditability, reproducibility review, and continued evaluation of QSCE/Madmartigan structured-output preservation as a potential near-term NISQ utility pathway. This work is positioned as a structured-output preservation benchmark rather than a universal quantum advantage claim. Its relevance lies in testing whether quantum hardware output can be engineered into stable, classifiable, reference-specific signal bands that may support future quantum-to-classical handoff, signaling, authentication, command validation, and cyber-hardening primitives. Reproducibility package available upon request at frank@quantummidiposse.com
This record contains the finalized Madmartigan Native-Bridge benchmark paper and supporting documentation for a global 96-active-qubit structured-output benchmark executed on IBM superconducting hardware. The benchmark extends the prior tiled Madmartigan scale-up work by testing whether the original seed-1337 16-qubit Madmartigan structured-output band could survive a stricter native-bridged condition: a single global 156-qubit hardware execution with 96 active qubits, six simultaneous 16-qubit regions, and native cross-region bridge operations inserted between tile regions. The final benchmark used the T6 rank-2 physical tile layout on IBM Marrakesh, preserved the exact original 16-qubit Madmartigan tile kernel, used 4096 shots per hardware execution, and used no quantum error correction or post-selection. The native-bridge layer selected the available active-topology cross-region bridge edges, corresponding to physical pairs (97,87) and (86,85). The raw exact-kernel native-bridge circuit transpiled to depth 654 with 1241 CZ gates, 2653 SX gates, 2496 RZ gates, 156 measurements, and 72 barriers. Across five global hardware executions, the raw bridged Madmartigan circuit produced repeatable Madmartigan-reference structured-output preservation, with mean F_XEB = 1.106965, mean HOG = 0.652515, mean Shannon entropy = 11.886623 bits per 16-qubit tile, and mean IPR = 3661.616. All 30 tile-level observations across five runs and six tile projections produced positive F_XEB, and all 30 HOG values exceeded 0.55. The benchmark includes a three-control ladder: an exact-scaled generic RCS native-bridge control, a phase-scrambled native-bridge control, and a partial-entanglement native-bridge ablation. The generic RCS and phase-scrambled controls preserved their own-reference structure but failed to reproduce the Madmartigan-reference band. The partial-entanglement ablation produced a separate high-attractor own-reference mode while retaining only weaker Madmartigan-reference overlap. The paper includes statistical control-separation analysis over tile-level observations, including t-intervals, Welch tests, Mann–Whitney tests, Cohen’s d, and bootstrap confidence intervals. The defensible claim is not full 96-qubit statevector fidelity, full tomography, fault-tolerant computation, or universal quantum advantage. The claim is narrower: repeatable, statistically separated, reference-specific structured-output preservation under global native-bridged NISQ execution. This upload is intended as a technical benchmark record and reproducibility-indexed evidence package. Full executable circuit artifacts, QPY/QASM3 files, and source-level reproduction materials may be withheld from public release where necessary to preserve IP integrity and may be made available through protected review channels. Media coverage / news release: The Quantum Insider, “Quantum Midi Posse Reports 96-Qubit Structured-Output Benchmark on IBM Hardware,” May 24, 2026. https://thequantuminsider.com/2026/05/24/quantum-midi-posse-reports-96-qubit-structured-output-benchmark-on-ibm-hardware/
Madmartigan RCS Benchmark Update: TRL-7 Real-Backend Validation of QSCE on ibm_marrakesh This technical update presents the first real-hardware Random-Circuit-Sampling (RCS) benchmark of the Quantum State Command Encoding (QSCE) architecture using the 16-qubit, ~55-layer hybrid circuit termed Madmartigan. The experiment was executed directly on the IBM ibm_marrakesh superconducting backend in a TRL-7 configuration with 4096 shots, using the same circuit instance previously validated on the Marrakesh noise model. Despite the adversarial nature of RCS—designed to overwhelm coherence, erase structure, and drive quantum systems into thermalized noise—the Madmartigan benchmark again demonstrates that QSCE maintains strong architectural structure under deep scrambling. On real hardware, the experiment achieves: XEB fidelity: 1.82 (absolute) Heavy-Output Generation (HOG): 0.719 Inverse Participation Ratio (IPR): 3647.22 Normalized IPR (nIPR): 0.0557 Shannon entropy: 11.88 bits (0.7427 normalized) These results extend the prior TRL-6 noise-model findings into a full TRL-7 regime, confirming that the observed behavior is not a simulator artifact. The entropy and IPR windows remain tightly aligned with the noise-model run, while the hardware XEB stays strictly positive at 55 layers—indicating a high-information, non-ergodic attractor band rather than a fully thermalized, Porter–Thomas distribution. As in the simulator study, the goal is not classical intractability but architectural validation: demonstrating that QSCE’s command-collapse logic, deterministic routing, and phase-anchored propagation remain stable even when subjected to deep random unitaries and adversarial entangling layers on real metal. The Madmartigan hardware benchmark therefore provides direct empirical support for QSCE’s orchestration and activation-propagation formalisms, confirming that the architecture exhibits resilience, directional structure, and engineered collapse behavior under one of the most chaotic quantum benchmarking regimes known—now validated at TRL-7 on an IBM production backend.
This record contains a technical note documenting the development, validation status, and intended scope of the QSCE Fermi-Hubbard kernel program. The work investigates whether Quantum State Command Encoding, in its QSCE-light configuration, can operate around a recognized many-body Hamiltonian simulation while preserving the underlying physical observables. The study implements a 4-qubit, 2-site spinful Fermi-Hubbard kernel using Jordan-Wigner-mapped hopping and on-site interaction terms, with double occupancy serving as the primary observable. After diagnosing and correcting an inert same-spin initial state, the v1.5 kernel produced a physically meaningful U/t-dependent double-occupancy response in local simulation. The corrected opposite-spin half-filled sector showed the expected suppression of double occupancy as U/t increased. Within this corrected configuration, QSCE-light preserved the bare Fermi-Hubbard observable curve while remapping the dominant readout identity from the bare branch’s 1001-type output toward a QSCE-light 0101 readout. This behavior establishes the central technical capability under investigation: observable-preserving readout remapping. Limited IBM Marrakesh hardware execution at U/t = 0 and U/t = 2 showed QSCE-light tracking bare Fermi-Hubbard double occupancy despite substantially greater transpiled depth. At U/t = 0, bare FH produced double occupancy of 0.479248 while QSCE-light produced 0.478027. At U/t = 2, bare FH produced 0.407227 while QSCE-light produced 0.421631. No-BSCM and phase-scrambled controls separated from the main QSCE-light branch, indicating that the BSCM/readout structure contributes functionally to observable preservation and output geometry stabilization. The current result is a kernel-level proof of concept rather than a completed materials-discovery result. The evidence supports QSCE-light as a candidate Hamiltonian-preserving structured readout layer for NISQ many-body simulation. The intended development path proceeds from completion of the U/t = 8 hardware point, to QSCE-light-only repeatability, to an 8-qubit 2x2 Fermi-Hubbard plaquette, and then to larger quasi-2D, 2D, and possible 3D extensions.
Version update: This record has been updated to remove enabling implementation details pending patent prosecution. Technical implementation is available under NDA. This preprint documents three quantum-native sensing kernels implemented on current IBM superconducting hardware under the Quantum State Command Encoding (QSCE) architecture. Rather than treating a quantum processor as a probabilistic number generator, QSCE treats the device as a command substrate, where quantum state is executable code and collapse is the execution of a control instruction. The work presents three low-qubit, shallow-depth sensing primitives designed to convert small, controlled perturbations into structured, repeatable changes in collapse-band behavior around a deterministic baseline: QMCA — a 1-qubit collapse-response kernel that converts small perturbations into calibrated changes in a non-baseline population while preserving a stable baseline anchor. SQCA — a 1-qubit hybrid-response kernel consistent with superconducting drive behavior, exhibiting a deterministic baseline anchor and a complementary deviation profile under perturbation. EBA — a 2-qubit correlation-based kernel producing a repeatable joint-distribution response signature under perturbation while retaining a deterministic baseline band. All three kernels are validated on real IBM backends (4096 shots per configuration), showing: Deterministic baselines under the null condition, with >99 of counts concentrated in a single “quiet” band, and Monotonic, structured deviations in non-baseline states under small perturbations, consistent with a calibrated response signature. Within QSCE, these sensing kernels are treated as command-native primitives: baseline and deviant collapse bands are assigned explicit operational semantics (“no signal,” “signal present,” “threshold exceeded”), so that collapse functions as a decision event rather than merely a readout step. The note contrasts these primitives with bespoke quantum magnetometers (e.g., NV and vapor-cell platforms) and argues that QSCE kernels trade extreme sensitivity for programmability, integrability, and substrate-level command semantics on today’s NISQ hardware. This preprint also situates the sensing kernels alongside recent QSCE benchmarking on IBM hardware (including RCS-style metrics on 16-qubit circuits), highlighting a unified, control-first approach to quantum sensing and computation. Enabling implementation details are withheld in this public version pending ongoing patent prosecution; technical details are available under NDA.
H. Billah and M.M.H. Sarker contributed equally to this work. Interpreting a fixed quantum circuit's output as evidence of a hardware effect requires ruling out two things usually conflated with it: finite-sample fluctuation, and structure already present in the circuit's own noiseless output. Less commonly checked is a third: whether the reference circuit compared against is the one actually executed, once compiler-level qubit routing is accounted for. We execute a fixed 35-qubit, 243-gate diagnostic circuit on IBM Heron-family hardware (three runs, two backends) and show this third check is essential: the routed circuit submitted to hardware has different noiseless predictions than the logical circuit intended, for several qubits. Against the correct, routed-circuit reference, the aggregate deviation is significant in two of three runs, and four registers (0, 9, 14, 27) show a significant output-probability deviation in every run — though we distinguish a high-confidence subset, {0, 9, 27}, with tightly time-matched calibration, from qubit 14, included only on an exploratory basis given its calibration was retrieved roughly two weeks post-execution. Same-backend replicates correlate more strongly by the Pearson measure, though a rank-based (Spearman) test shows this gap does not survive at the level of register ordering, indicating substantial leverage from a small number of registers rather than a broadly robust pattern; these three executions also share a byte-identical payload and are not independent replications in the strictest sense. The mechanism is only partially resolved: independent single-qubit readout error and raw gate count are ruled out as complete explanations for most of these registers, but the simplest version of the leading hypothesis for the single most-affected register does not reproduce the observed cross-backend pattern even with live, backend-specific timing data. A second, structurally different circuit validated only in simulation calibrates the statistical procedure's behavior under one synthetic noise model; it does not itself establish generality to real hardware, and the specific register set found here should not be expected to generalize beyond this study. Note on scope: this is a methodology and case-study contribution centered on executed-circuit references for fixed-circuit diagnostics, not a characterization of IBM Heron hardware in general or a randomized-benchmarking experiment in the formal sense. Supporting data, the routed OpenQASM circuits, raw measurement counts, and analysis code for this study are available on request from the corresponding author. Affiliation: Sonicium Quantum Lab Ltd., Dhaka, Bangladesh.
This record contains an English manuscript, the Japanese original manuscript, and selected structured CSV/JSON raw-count logs from IBM Quantum and simulator/control runs. The work visualizes quantum-correlation structures predicted by standard quantum mechanics as multi-shot raw-count landscapes on IBM Quantum hardware. It records four-outcome pair distributions, 00, 01, 10, and 11, and connects the resulting correlation landscape to pre-shared classical classification rules. This record does not claim superluminal communication, unconditional information transfer, or a modification of quantum mechanics. The purpose is to preserve the raw-count evidence and manuscript materials for reproducibility, review, and future journal submission.