We investigate whether a training-free thermodynamic stability metric Φ = I × ρ - α × S, computed from IBM Quantum calibration data before circuit execution, can serve as a routing signal for allocating computation between quantum hardware and classical simulation in the tested setting. Across 23 tests on real IBM Quantum hardware, we validate a Φ-based routing framework and show in direct crossover tests that LOW-Φ quantum execution can be worse than exact classical simulation for the tested classically tractable circuits: in the primary crossover test, classical simulation achieved 0.00% error while LOW-Φ quantum execution produced 8.23% error on the same circuit. Under a strict methodology with verified physical qubit binding and decisive ground truth, HIGH-Φ versus LOW-Φ error ratios ranged from 2.90x (QPE) to 30.47x (Bernstein-Vazirani) across 7 tested algorithms. The strict seven-algorithm tests constitute the primary evidence layer, while the broader 23-test suite provides supporting boundary conditions on size, depth, and reproducibility. Circuit size and depth impose additional routing boundaries: in the tested conditions, LOW-Φ execution at 15 qubits produced 94.85% error and execution at circuit depth 103 produced 67.29% error, both transitions into regimes where classical fallback was more reliable. These results support a routing decision framework in which minimum Φ across circuit qubits determines whether to execute on quantum hardware or fall back to classical simulation, with hybrid strategies retained as a natural extension. The methods described in this paper are the subject of U.S. Provisional Patent Application No. 63/956,752 (filed January 9, 2026). No license to implement or commercialize the described methods is granted by this publication. All rights reserved.
We investigate whether a training-free thermodynamic stability metric Φ = I × ρ - α × S, computed from IBM Quantum calibration data before circuit execution, can serve as a routing signal for allocating computation between quantum hardware and classical simulation in the tested setting. Across 23 tests on real IBM Quantum hardware, we validate a Φ-based routing framework and show in direct crossover tests that LOW-Φ quantum execution can be worse than exact classical simulation for the tested classically tractable circuits: in the primary crossover test, classical simulation achieved 0.00% error while LOW-Φ quantum execution produced 8.23% error on the same circuit. Under a strict methodology with verified physical qubit binding and decisive ground truth, HIGH-Φ versus LOW-Φ error ratios ranged from 2.90x (QPE) to 30.47x (Bernstein-Vazirani) across 7 tested algorithms. The strict seven-algorithm tests constitute the primary evidence layer, while the broader 23-test suite provides supporting boundary conditions on size, depth, and reproducibility. Circuit size and depth impose additional routing boundaries: in the tested conditions, LOW-Φ execution at 15 qubits produced 94.85% error and execution at circuit depth 103 produced 67.29% error, both transitions into regimes where classical fallback was more reliable. These results support a routing decision framework in which minimum Φ across circuit qubits determines whether to execute on quantum hardware or fall back to classical simulation, with hybrid strategies retained as a natural extension. The methods described in this paper are the subject of U.S. Provisional Patent Application No. 63/956,752 (filed January 9, 2026). No license to implement or commercialize the described methods is granted by this publication. All rights reserved.
We investigate whether a training-free thermodynamic stability metric Φ = I × ρ - α × S, computed from IBM Quantum calibration or telemetry data, can drive closed-loop intervention decisions during execution-associated monitoring windows on real hardware. Across 10 paid circuit tests on three IBM backends (ibm_fez, ibm_marrakesh, ibm_torino), together with simulated and telemetry-based harness validation, we evaluate a closed-loop controller that monitors Φ during an execution-associated window and supports five intervention actions: CONTINUE, CONTINUE-DEGRADED, CLASSICAL-FALLBACK, CHECKPOINT-MIGRATE, and ABORT-RESTART. In a same-circuit controlled comparison on ibm_fez, swapping LOW-Φ qubits (Φ = 0.097, 0.030) for HIGH-Φ qubits (Φ = 0.9988, 0.9984) reduced error from 18.36% to 2.73% on an identical Deutsch-Jozsa circuit, an 85.1% relative error reduction. Under matched conditions, composite Φ selection outperformed raw T2 selection by 7.79 percentage points on ibm_fez (68.7% relative reduction) and by 6.37 percentage points aggregate across three backends. Mid-circuit dynamic branching on IBM hardware achieved 98.78% per-shot conditional consistency between probe outcome and branch marker, with an estimated 101,220 logical gates avoided on the ABORT path. A Wilson confidence interval non-overlap rule triggered ABORT-RESTART on 1 of 3 backends in the tested setting. Classical checkpoint representation at a segmentation boundary enabled suffix migration from LOW-Φ to HIGH-Φ qubits with 82.15% final fidelity, without storing an unknown quantum state. Honest counterexamples are preserved: in a three-policy cost comparison a seeded random pair outperformed the Φ-guided pair on ibm_fez, and on ibm_marrakesh raw T2 selection outperformed Φ selection under matched compiled circuit conditions. These results support a closed-loop intervention framework in which Φ can operate as a control variable during execution-associated monitoring rather than only as a pre-execution selection score. The methods described in this paper are the subject of U.S. Provisional Patent Application No. 63/973,723 (filed February 2, 2026). No license to implement or commercialize the described methods is granted by this publication. All rights reserved.
We present empirical evidence that a thermodynamic stability metric Φ = I × ρ − α × S serves as a leading indicator of qubit degradation on IBM Quantum hardware and provides practical discrimination across multiple circuit and hardware validation settings. Analysis of 445 qubits across three backends (ibm_fez, ibm_marrakesh, ibm_torino) over 30 days demonstrates 100% detection of IBM-reported status transitions in the tested window, with average lead time of 163 hours (6.8 days) and maximum lead time of 480 hours (20 days) for warnings occurring at least 24 hours before degradation. The coherence ratio ρ = T2/T1 accounts for 70 to 78% of component contribution in backend-split component analysis, suggesting a substantially larger role for coherence information in stability monitoring than is reflected in prior qubit-selection heuristics. Cross-backend transfer achieves 98.4% balanced accuracy without retraining. Additional validation demonstrates 4.34x higher two-qubit gate error for low-Φ qubit pairs, 8 to 18x error discrimination across circuit depths from 10 to 500 gates, and correct identification of all five failed qubits in the tested dataset via Φ < 0. These results establish Φ as an early warning indicator for quantum processor maintenance and a practical qubit selection metric. The methods described in this paper are the subject of U.S. Provisional Patent Application No. 63/952,883 (filed January 2, 2026). No license to implement or commercialize the described methods is granted by this publication. All rights reserved.
We experimentally study error mitigation and finite-shot sampling on superconducting quantum hardware under a constrained execution budget. The study combines calibration-aware qubit selection, circuit-depth scaling, zero-noise extrapolation, dynamical decoupling, readout-error mitigation, and repeated-shot estimation on an IBM Quantum processor. Experiments are organized across ideal simulation, noise-model simulation, and physical-device execution to separate sampling uncertainty from device-induced error. We investigate how mitigation performance changes with circuit depth, effective noise scale, qubit connectivity, and measurement budget, and quantify accuracy using expectation-value error, mean-squared error, statistical uncertainty, and mitigation gain. A fixed hardware-execution budget is used to evaluate shot allocation strategies and repeated measurements without relying on unlimited sampling. The resulting analysis provides a hardware-aware characterization of when mitigation improves expectation-value estimation and when finite-shot fluctuations offset the benefit of additional mitigation overhead. The implementation uses contemporary Qiskit and IBM Quantum Runtime workflows and is designed to provide reproducible experimental evidence for error-mitigation studies on current quantum processors.
We investigate whether the three normalized components of a thermodynamic stability metric, normalized fidelity I, coherence ratio ρ = T2/T1, and readout error S, can serve as training-free input features for machine learning models that predict the Φ-threshold qubit-quality class across IBM Quantum hardware. Using a strict methodology that excludes Φ from the feature set and evaluates generalization via backend-split evaluation, we find that on 445 qubits from three IBM Quantum backends, (I, ρ, S) predict the Φ-threshold class with 98.4% average balanced accuracy on held-out backends without retraining. Feature ablation reveals that ρ alone achieves 94.6% balanced accuracy and carries 70 to 78% of feature importance, while I alone and S alone are near random at 52.2% and 50.9% respectively. All four tested model architectures (Random Forest, Gradient Boosting, Neural Network, SVM) exceed 80% balanced accuracy under the strict protocol. For the narrower task of predicting T2-based hardware quality, a data-driven threshold of 0.60 outperforms the physics-derived threshold of 0.25 by 16.2 percentage points. These results establish (I, ρ, S) as a model-agnostic, training-free feature representation for predicting the Φ-threshold qubit-quality class across the tested IBM Quantum backends, with coherence ratio ρ carrying most of the predictive signal. The methods described in this paper are the subject of U.S. Provisional Patent Application No. 63/956,800 (filed January 9, 2026). No license to implement or commercialize the described methods is granted by this publication. All rights reserved.
A feasibility study testing whether quantum circuits can be constructedwhere exact classical simulation cost grows much faster than the physicalcircuit depth needed to run them, using output-aware tensor-networkcontraction validated against two real IBM Quantum hardware jobs(dadm3mjdd5gc73d7gvjg, dadm9qdnj4cs73ae2teg; 40,960 shots total). The honest conclusion is no — not on any hardware available today. Reachingthat conclusion required correcting the study's own conclusions six times;those corrections, and the measurements behind them, are the primarycontribution. Key measured results: classical contraction cost scales as 2^w withmeasured exponent 1.984; effective two-qubit error on IBM's Heronarchitecture is gate-local at 0.845%, reproducible across two independentjobs; memory is not a binding constraint once slicing is applied (1.00-3.18xFLOP penalty); connectivity degree, not planarity, is the dominanttopological lever; standard error suppression (dynamical decoupling +twirling) made fidelity worse on this circuit class; qubit count sets a hardceiling on achievable classical hardness (2^n). This is a feasibility study, not an advantage claim: no quantum advantage,no novel algorithm (frontier contraction is textbook variable elimination),and no verified large-width result are claimed. Full reproducibility scriptsincluded.
Quantum processors have crossed the one-hundred-qubit mark, but noise continues to limit circuit performance, while full quantum error correction remains too costly for routine use. Error suppression and mitigation therefore play an important role in extracting value from current hardware, yet independent comparisons of commercial solutions on identical workloads and devices remain scarce. We benchmark IBM Qiskit Runtime, Q-CTRL Performance Management, and Qedma QESEM on IBM Pittsburgh, a 156-qubit IBM Quantum Heron r3 processor. For Sampler workloads, we run Bernstein-Vazirani, quantum phase estimation, GHZ-state preparation, and randomized mirror circuits with up to 100 measured qubits, comparing raw execution, IBM measurement twirling, and Q-CTRL. For Estimator workloads, we measure chain-averaged magnetization and correlation observables of an eight-layer transverse-field Ising circuit at 25, 50, and 75 qubits against an exact matrix-product-state reference, comparing IBM raw execution, IBM TREX plus twirling, Q-CTRL, and QESEM. Q-CTRL produced the best results on the three structured Sampler workloads while keeping reported QPU times within the same order as the IBM configurations. Across six Ising observable and system-size cases, aggregate mean absolute error was 0.0883 for IBM raw execution, 0.0807 for IBM TREX plus twirling, 0.0285 for Q-CTRL, and 0.0188 for QESEM. Relative to raw execution, Q-CTRL and QESEM reduced aggregate error by factors of 3.10 and 4.70, respectively, while QESEM used 7.5 to 11.1 times the reported QPU time of Q-CTRL. These results show that managed error suppression and mitigation can substantially improve current hardware performance, but with distinct accuracy and execution-time tradeoffs.