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IEEE International Integrated Reliability Workshop final report

Overview and Perspective of Cryo-CMOS Devices Toward Scalable Quantum Computers

Hiroshi Oka

Published Oct 5, 2025• 0 citations
Publisher
DOI
10.1109/iirw66154.2025.11481755

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International Conference on Sciences and Techniques of Automatic Control and Computer Engineering•Dec 20, 2025•0 citations
Quantum computing requires scalable, energyefficient control electronics at cryogenic temperatures. Cryogenic CMOS (cryo-CMOS) enables integration with quantum processors, operating below 4 K while leveraging advanced CMOS processes. This paper reviews cryo-CMOS circuits and systems developed from 2016 to 2025, covering device behavior, analog, mixedsignal, and digital circuits, and system-level integration for largescale quantum control. Multiple implementations are compared, highlighting trade-offs in power, noise, scalability, and temperature operation. Key trends include fully integrated Cryo-SoCs, hybrid CMOS-III-V technologies, and machine-learning-assisted calibration. Remaining challenges in modeling, energy dissipation, and thermal management are discussed, outlining a roadmap for nextgeneration cryo-CMOS quantum architectures.