International Conference on Electrical, Computer & Telecommunication Engineering (ICECTE)

FPGA Acceleration of Quantum Circuit Primitives: Fixed-Point Microcoded Design and CPU Comparison

Shahriar Rizvi, Md. Nazrul Islam Mondal

Published Jan 29, 2026• 0 citations

Abstract

Quantum algorithms such as the Quantum Fourier Transform (QFT), Grover’s Search, the Bernstein–Vazirani (BV) algorithm, and Bell-state generation are computationally intensive to emulate on classical processors due to the exponential growth of state vectors. This work presents a fixed-point, microcoded FPGA accelerator that achieves deterministic timing, near-unit fidelity, and linear scalability up to 4 qubits. The design features a microcoded control plane with pairwise and diagonal opcodes, fixed-point complex arithmetic, and subspace-gated execution (qubit0= LSB). We benchmark QFT(2–4), BV(2–4), Grover(4), and Bell(2) at 100 MHz and compare against equivalent CPU state-vector simulations. Across all algorithms, the FPGA demonstrates consistent latency reduction: QFT: 88×–154× (98.9–99.4% faster), BV: 54×–90× (98.1–98.9% faster), Bell: 282× (99.6% faster), and Grover-4: 14.2× (93.0% faster). Fidelity is near-unit for all programs except a single BV-2 run that yields 0.875 ; QFT, Bell, BV-3, BV-4 and Grover-4 achieve 1.000. Latency scales linearly with qubit count—growing by ~1.8× per additional qubit for QFT and ~1.6× for BV—confirming the deterministic and cycle-predictable nature of the microcoded architecture. Results reflect 100 MHz RTL simulation (Verilator); we report synthesis resources and post-P&R Fmax, and express speedups normalized to 100 MHz. These results show that even a modest FPGA can outperform our CPU state-vector baseline on small-n kernels while preserving deterministic, cycle-accurate timing for small-to-medium quantum workloads through spatial parallelism and hardware-level determinism.

DOI: 10.1109/icecte69292.2026.11429464

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