Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms. Unlike classical systems, however, identical quantum circuits may exhibit substantially different behavior across devices due to architectural variations in qubit connectivity, gate fidelity, and coherence times.
In this work, we systematically benchmark five representative quantum algorithms - Bell state preparation, GHZ state generation, Quantum Fourier Transform (QFT), Grover's Search, and the Quantum Approximate Optimization Algorithm (QAOA) - across trapped-ion, superconducting, and simulator backends using Amazon Braket. Performance metrics including fidelity, CHSH violation, success probability, circuit depth, and gate counts are evaluated.
Our results demonstrate a strong dependence of algorithmic performance on hardware topology and noise characteristics. For example, 10-qubit GHZ states achieved fidelities above 0.8 on trapped-ion hardware, while superconducting platforms dropped below 0.15 due to routing overhead and accumulated two-qubit gate errors. These findings highlight the importance of hardware-aware algorithm selection and provide practical guidance for benchmarking in the NISQ era.
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Submitted to the Journal of Supercomputing. Benchmarking results for IonQ Forte-1, Rigetti Ankaa-3, and IQM Garnet
Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms. Unlike classical systems, however, identical quantum circuits may exhibit substantially different behavior across devices due to architectural variations in qubit connectivity, gate fidelity, and coherence times.
In this work, we systematically benchmark five representative quantum algorithms - Bell state preparation, GHZ state generation, Quantum Fourier Transform (QFT), Grover's Search, and the Quantum Approximate Optimization Algorithm (QAOA) - across trapped-ion, superconducting, and simulator backends using Amazon Braket. Performance metrics including fidelity, CHSH violation, success probability, circuit depth, and gate counts are evaluated.
Our results demonstrate a strong dependence of algorithmic performance on hardware topology and noise characteristics. For example, 10-qubit GHZ states achieved fidelities above 0.8 on trapped-ion hardware, while superconducting platforms dropped below 0.15 due to routing overhead and accumulated two-qubit gate errors. These findings highlight the importance of hardware-aware algorithm selection and provide practical guidance for benchmarking in the NISQ era.
The performance of quantum algorithms on near-term devices is heavily constrained by hardware noise, yet systematic comparisons of algorithmic vulnerability across diverse noise types remain limited. In this study, we benchmark three representative algorithms: quantum teleportation, Grover’s search, and the Quantum Approximate Optimization Algorithm (QAOA), under depolarizing, amplitude damping, phase damping, and thermal relaxation channels. Using exact density-matrix simulations, we characterize algorithmic performance by evaluating state fidelity decay as a function of noise strength. To enable fair, structure-aware comparisons across circuits of varying depths, we introduce a novel metric, the per-gate decay rate. Our analysis reveals that teleportation exhibits the lowest per-gate vulnerability, whereas Grover’s algorithm demonstrates substantially larger, super-linear decay driven by its repeated oracle–diffuser architecture. QAOA displays intermediate and stable noise resilience across system sizes. Finally, we validate our simulation framework through hardware experiments on an IBM Heron processor, demonstrating strong agreement with theoretical predictions (Pearson’s correlation coefficient r = 0.981). This work establishes a quantitative, structure-aware framework for assessing circuit-level noise sensitivity and offers actionable insights for algorithm selection in the noisy intermediate-scale quantum era.
Solving optimization problems is critical across many research domains, but the high dimensionality of parameter spaces often poses significant challenges. The Quantum Approximate Optimization Algorithm (QAOA) has emerged as a promising approach for accelerating optimization in the Noisy Intermediate-Scale Quantum (NISQ) era by leveraging both classical and quantum computational resources. However, its performance can vary depending on the underlying quantum hardware architecture. In this work, we evaluate the performance of QAOA on different quantum hardware platforms, specifically, superconducting transmon qubits and trapped-ion qubits, targetting real-world optimization problems formulated as fully connected Quadratic Unconstrained Binary Optimization (QUBO) instances. We evaluate both the solution quality and time-to-solution using dense QUBO matrices. Furthermore, we show that large-scale problems, such as a 100-bit QUBO instance, can be effectively tackled by integrating quantum computing with high-performance computing (HPC) resources. This study provides practical insights into the strengths and limitations of different qubit technologies and advances the application of quantum computing in solving real-world optimization problems.
Abstract The emergence of noisy intermediate-scale quantum processors marked a pivotal stage in quantum computing, enabling the first demonstrations of quantum computational advantage despite limitations in qubit count, connectivity, and gate fidelity. Among the earliest and most accessible NISQ platforms were the IBM Quantum TM TM computers, which provided an open testbed for algorithm development, benchmarking, and error mitigation. Crucially, many of these pioneering quantum computers have since been retired, rendering their performance records fragmented and at risk of permanent loss. This work presents a comprehensive benchmarking study of these early IBM quantum computers, documenting their architectural layouts, qubit connectivity, native gate sets, coherence properties, effective Hamiltonians, control mechanisms, error rates, and operational performance. We reconstruct the operational profiles of these quantum computers and highlight the trends, trade-offs, and limitations that characterized superconducting quantum hardware in the NISQ era. This study establishes a historical baseline for assessing progress in quantum hardware development, offering essential guidance on error scaling, coherence limitations, and architectural trade-offs for designing next-generation quantum hardware. These insights directly inform superconducting quantum architecture design, compilation strategies, and error-resilient algorithms on the path toward fault-tolerant quantum computation.
Quantum computing promises to revolutionize several scientific and industrial domains by tackling problems that are intractable for classical supercomputers. At the centre of this effort is the quantum processor unit (QPU), implemented today across multiple physical qubit platforms. This review provides a comparative analysis of the state of quantum processors as of late 2024/early 2025, focusing on superconducting qubits, trapped ions, photonic systems, neutral atoms, silicon spin qubits, and emerging topological approaches. We compile and compare recent processor generations such as IBM’s Heron family, Google’s updated Sycamore-class devices, Quantinuum’s H-series, IonQ’s Aria and Forte, neutral-atom platforms with more than 1,000 trapped atoms, and silicon spin prototypes like Tunnel Falls. Key performance metrics, including qubit count, gate and readout fidelity, coherence time, operation speed, and holistic benchmarks such as Quantum Volume (QV) and Algorithmic Qubits (#AQ) are examined with reference to concrete experimental milestones. We discuss algorithmic capabilities demonstrated on current hardware, early realizations of logical qubits and fault-tolerant primitives, and the distinction between feasibility-oriented “quantum advantage” experiments and emerging signs of practical “quantum utility”. Finally, we outline the main technical bottlenecks for each platform on the path from today’s NISQ devices toward universal fault-tolerant quantum computers.
Quantum computing has transitioned from a theoretical curiosity to an emerging technological paradigm with demonstrable computational advantages in specific problem domains. This paper presents a comprehensive review of current advances in quantum computing hardware, software, and near-term applications within the Noisy Intermediate-Scale Quantum (NISQ) era. We examine the architectural evolution of leading quantum platforms, including superconducting, trapped-ion, and photonic systems, analyzing their qubit counts, gate fidelities, and coherence times. The paper evaluates key quantum algorithms Shor's factoring algorithm [1], Grover's search algorithm [2], the Variational Quantum Eigensolver (VQE) [3], and the Quantum Approximate Optimization Algorithm (QAOA) [4] in the context of their practical applicability to real-world problems. We further discuss the milestone of quantum computational advantage demonstrated by Google's Sycamore processor [5] and IBM's ambitious hardware roadmap toward fault-tolerant quantum computing [6]. Our analysis reveals that while universal fault-tolerant quantum computing remains a long-term objective, NISQ-era devices are already yielding valuable results in quantum chemistry simulation, combinatorial optimization, and quantum machine learning. We conclude by identifying the critical challenges—error correction, scalability, and algorithm design that must be addressed to realize the full potential of quantum computing.
Quantum computers have now surpassed classical simulation limits, yet noise continues to limit their practical utility. As the field shifts from proof-of-principle demonstrations to early deployments, there is no standard method for meaningfully and scalably comparing heterogeneous quantum hardware. Existing benchmarks typically focus on gate-level fidelity or constant-depth circuits, offering limited insight into algorithmic performance at depth. Here we introduce a benchmarking protocol based on the linear ramp quantum approximate optimization algorithm (LR-QAOA), a fixed-parameter, deterministic variant of QAOA. LR-QAOA quantifies a QPU's ability to preserve a coherent signal as circuit depth increases, identifying when performance becomes statistically indistinguishable from random sampling. We apply this protocol to 24 quantum processors from six vendors, testing problems with up to 156 qubits and 10,000 layers across 1D-chains, native layouts, and fully connected topologies. This constitutes the most extensive cross-platform quantum benchmarking effort to date, with circuits reaching a million two-qubit gates. LR-QAOA offers a scalable, unified benchmark across platforms and architectures, making it a tool for tracking performance in quantum computing.