Successful deployment of cryo-CMOS technologies supporting quantum computing systems requires radio frequency (RF) and microwave circuitry that operates at cryogenic temperatures. The performance of this circuitry needs to be validated through reliable in-situ measurement. Two measurement modalities exist for this purpose, using either dilution refrigerators or cryogenic on-wafer probe stations. In both cases, confidence is needed in the measurements so that reliable decisions can be made concerning the performance of the RF circuitry and related cryo-CMOS technology. This paper discusses recent advances and challenges in both measurement modalities and how these advances are facilitating developments with cryo-CMOS technologies.
Successful deployment of cryo-CMOS technologies supporting quantum computing systems requires radio frequency (RF) and microwave circuitry that operates at cryogenic temperatures. The performance of this circuitry needs to be validated through reliable in-situ measurement. Two measurement modalities exist for this purpose, using either dilution refrigerators or cryogenic on-wafer probe stations. In both cases, confidence is needed in the measurements so that reliable decisions can be made concerning the performance of the RF circuitry and related cryo-CMOS technology. This paper discusses recent advances and challenges in both measurement modalities and how these advances are facilitating developments with cryo-CMOS technologies.
Accurate and low-noise generation and amplification of microwave signals are required for the manipulation and readout of quantum bits (qubits). A fault-tolerant quantum computer operates at deep cryogenic temperatures (i.e., <; 100mK) and requires thousands of qubits for running practical quantum algorithms. Consequently, CMOS radio-frequency (RF) integrated circuits operating at cryogenic temperatures down to 4 K (Cryo-CMOS) offer a higher level of system integration and scalability for future quantum computers. In this paper, we extensively discuss the role, benefits, and constraints of Cryo-CMOS for qubits control and readout. The main characteristics of the CMOS transistors and their impacts on RF circuit designs are described. Furthermore, opportunities and challenges of low noise RF signal generation and amplification are investigated.
Abstract Development of large-scale quantum computing systems will require radio frequency (RF) and microwave technologies operating reliably at cryogenic temperatures down to tens of milli-Kelvin (mK). The quantum bits in the most promising quantum computing technologies such as the superconducting quantum computing are designed using principles of microwave engineering and operated using microwave signals. The control, readout, and coupling of qubits are implemented using a network of microwave components operating at various temperature stages. To ensure reliable operation of quantum computing systems, it is critical to ensure optimal performance of these microwave components and qubits at their respective operating temperatures, which can be as low as mK temperatures. It is, therefore, critical to understand the microwave characteristics of waveforms, components, circuits, networks, and systems at cryogenic temperatures. The UK’s National Physical Laboratory (NPL) is focussed on developing new microwave measurement capabilities through the UK’s National Quantum Technologies Programme to address various microwave test and measurement challenges in quantum computing. This includes the development of various measurement capabilities to characterize the microwave performance of quantum and microwave devices and substrate materials at cryogenic temperatures. This paper summarizes the roadmap of activities at NPL to address these microwave metrology challenges in quantum computing.
Quantum computing requires scalable, energyefficient control electronics at cryogenic temperatures. Cryogenic CMOS (cryo-CMOS) enables integration with quantum processors, operating below 4 K while leveraging advanced CMOS processes. This paper reviews cryo-CMOS circuits and systems developed from 2016 to 2025, covering device behavior, analog, mixedsignal, and digital circuits, and system-level integration for largescale quantum control. Multiple implementations are compared, highlighting trade-offs in power, noise, scalability, and temperature operation. Key trends include fully integrated Cryo-SoCs, hybrid CMOS-III-V technologies, and machine-learning-assisted calibration. Remaining challenges in modeling, energy dissipation, and thermal management are discussed, outlining a roadmap for nextgeneration cryo-CMOS quantum architectures.
Quantum computing holds the potential to solve problems beyond the capabilities of classical computers. However, realizing practical large-scale quantum computers faces critical challenges, including the key bottleneck in wiring quantum processors operating at cryogenic temperatures to their room temperature control electronics. This article explores cryo-CMOS ICs as an enabling technology to circumvent such a wiring bottleneck. After reviewing the basics of quantum computing and the behavior of CMOS devices at cryogenic temperatures, the requirements for the interface electronics for superconducting and semiconductor qubits are discussed, and state-of-the-art cryo-CMOS circuit solutions are briefly described, including a few hints to other qubit platforms. Finally, the article concludes with an overview of future challenges to be addressed to realize the vision of cryo-CMOS technology as an enabler of large-scale quantum computers with practical applications.
Recent advances in solid-state qubit technology are paving the way to fault-tolerant quantum computing systems. However, qubit technology is limited by qubit coherence time and the scaling of quantum processors is limited by the complexity of coupling quantum systems with a classical electronic infrastructure. Hence, the proposed approach is to use CMOS at cryogenic temperatures, in order to ensure physical proximity to the quantum bits, thus reducing thermal gradients and increasing compactness. In this thesis, several RF circuits designed using commercial CMOS technology have been shown to be working at cryogenic temperatures. Such circuits could be easily interfaced (or integrated, in the future) with a qubit processor. The performance of the circuits is comparable to the state-of-the-art systems, currently used as control units for qubits. Moreover, these circuits have a much smaller form factor and could be made to work inside a dilution refrigerator where the qubits are operational, hence providing the first demonstration of a scalable solution.
Quantum computing is developing rapidly, especially those systems based on superconductors, electron or hole spin in semiconductors[1], which generally operate at sub-1 K temperatures[2]. And the classical electronics control system for qubits at room temperature meets increasing challenges, due to utter interconnect complexity, poor system reliability, and cost. Integrating part or all of the interface electronics inside the dilution refrigerator becomes an promising branch. For the convenience of cryo-electronics testing and establishing of the whole electronics control system for quantum computing at cryogenic temperatures, we describe the operation of some commercial devices at cryogenic temperatures, including two FPGAs respectively on 28 nm and 16 nm process node and three GaAs RF switches.