Efficient and scalable qubit readout is a critical requirement for realizing quantum computing. Radio frequency (RF) readout emerges as a promising candidate due to its high speed and multiplexing capabilities. In this study, we employ a 2-D access array to significantly reduce the number of control lines needed per qubit for readout. We demonstrate frequency-domain multiplexing (FDM) and simultaneous readout at two distinct frequencies in a semiconductor quantum device. Optimizations in circuit design, device proximity, power levels, and RF readout frequency enhanced the signal-to-noise ratio (SNR) by an order of magnitude. Despite these advancements, challenges such as bandwidth overlap persist, which can impact the scalability of FDM. Our findings highlight both the potential and the limitations of RF readout in scalable quantum computing systems.
Efficient and scalable qubit readout is a critical requirement for realizing quantum computing. Radio frequency (RF) readout emerges as a promising candidate due to its high speed and multiplexing capabilities. In this study, we employ a 2-D access array to significantly reduce the number of control lines needed per qubit for readout. We demonstrate frequency-domain multiplexing (FDM) and simultaneous readout at two distinct frequencies in a semiconductor quantum device. Optimizations in circuit design, device proximity, power levels, and RF readout frequency enhanced the signal-to-noise ratio (SNR) by an order of magnitude. Despite these advancements, challenges such as bandwidth overlap persist, which can impact the scalability of FDM. Our findings highlight both the potential and the limitations of RF readout in scalable quantum computing systems.
In semiconductor spin quantum bits (qubits), the radio-frequency (RF) gate-based readout is a promising solution for future large-scale integration, as it allows for a fast, frequency-multiplexed readout architecture, enabling multiple qubits to be read out simultaneously. This paper introduces a theoretical framework to evaluate the effect of various parameters, such as the readout probe power, readout chain's noise performance, and integration time on the intrinsic readout signal-to-noise ratio (SNR), and thus readout fidelity of RF gate-based readout systems. By analyzing the underlying physics of spin qubits during readout, this work proposes a qubit readout model that takes into account the qubit's quantum mechanical properties, providing a way to evaluate the trade-offs among the aforementioned parameters. The validity of the proposed model is evaluated by comparing the simulation and experimental results. The proposed analytical approach, the developed model, and the experimental results enable designers to optimize the entire readout chain effectively, thus leading to a faster, lower-power readout system with integrated cryogenic electronics.
Spins in silicon quantum devices are promising candidates for large-scale quantum computing. Gate-based sensing of spin qubits offers a compact and scalable readout with high fidelity, however, further improvements in sensitivity are required to meet the fidelity thresholds and measurement timescales needed for the implementation of fast feedback in error correction protocols. Here, we combine radio-frequency gate-based sensing at 622 MHz with a Josephson parametric amplifier, that operates in the 500-800 MHz band, to reduce the integration time required to read the state of a silicon double quantum dot formed in a nanowire transistor. Based on our achieved signal-to-noise ratio, we estimate that singlet-triplet single-shot readout with an average fidelity of 99.7% could be performed in 1 μs, well below the requirements for fault-tolerant readout and 30 times faster than without the Josephson parametric amplifier. Additionally, the Josephson parametric amplifier allows operation at a lower radio-frequency power while maintaining identical signal-to-noise ratio. We determine a noise temperature of 200 mK with a contribution from the Josephson parametric amplifier (25%), cryogenic amplifier (25%) and the resonator (50%), showing routes to further increase the readout speed.
A scalable spin-qubit quantum processor requires fast, high-fidelity readout circuits operating at cryogenic temperatures (CTs). This work analyzes the radio frequency (RF) reflectometry readout mechanism to establish the link between conductance modulation, single-electron transistor (SET) matching network design, reflected signal power, and receiver (RX) noise temperature. Based on this analysis, a cryogenic RX architecture employing a passive switched-capacitor front-end is proposed. The front-end performs RF amplification and downconversion using transistors as switches, avoiding active RF amplification and mitigating shot-noise limitations. The RX is implemented in 40-nm CMOS and operates from 100 MHz to 2.2 GHz. Measurements demonstrate a minimum noise temperature of approximately 15 K at 4.2 K. When integrated with a quantum device, the RX achieves a signal-to-noise ratio (SNR) of 9.8 dB for a 10-µs integration time and enables 99.9% charge-state readout fidelity without external cryogenic amplifiers. This work represents the first demonstration of such fidelity using a cryo-CMOS RX and constitutes an important step toward scalable integration of qubit readout electronics.
Semiconductor quantum dot spin qubits, which employ radio frequency (RF) techniques for manipulation and readout, present a compelling pathway toward scalable quantum computation. We introduce a robust, miniaturized, and modular RF package designed for high-fidelity, low-crosstalk control of quantum dot qubit systems. This design integrates a master board with an interchangeable daughterboard for rapid sample exchange. Its compact footprint (28 × 50 × 12 mm3) is compatible with standard dilution refrigerator stages. The module provides 48 low-pass-filtered DC bias lines, 28 of which support combined RF/DC operation for qubit control. Dedicated RF lines include eight microwave channels with a DC to 6 GHz bandwidth and 20 DC pulse gate lines with a −3 dB cutoff at 3 GHz. A significant feature of this design is the suppression of crosstalk between adjacent microwave lines to <−30 dB (or less than 0.1% signal leakage) from DC to 6 GHz. This is achieved using optimized alternating ground planes and fencing vias. The module directly supports baseband control strategies, thereby mitigating gigahertz-frequency heating effects in high-density qubit arrays.
Quantum computing is predicted to provide unprecedented enhancements in computational power. A quantum computer requires implementation of a well-defined and controlled quantum system of many interconnected qubits, each defined using fragile quantum states. The interest in a spin-based quantum computer in silicon stems from demonstrations of very long spin-coherence times, high-fidelity single spin control and compatibility with industrial mass-fabrication. Industrial scale fabrication of the silicon platform offers a clear route towards a large-scale quantum computer, however, some of the processes and techniques employed in qubit demonstrators are incompatible with a dense and foundry-fabricated architecture. In particular, spin-readout utilises external sensors that require nearly the same footprint as qubit devices. In this thesis, improved readout techniques for silicon quantum devices are presented and routes towards implementation of a scalable and high-sensitivity readout architecture are investigated. Firstly, readout sensitivity of compact gate-based sensors is improved using a high-quality factor resonator and Josephson parametric amplifier that are fabricated separately from quantum dots. Secondly, an integrated transistor-based control circuit is presented using which sequential readout of two quantum dot devices using the same gate-based sensor is achieved. Finally, a large-scale readout architecture based on random-access and frequency multiplexing is introduced. The impact of readout circuit footprint on readout sensitivity is determined, showing routes towards integration of conventional circuits with quantum devices in a dense architecture, and a fault-tolerant architecture based on mediated exchange is introduced, capable of relaxing the limitations on available control circuit footprint per qubit. Demonstrations are based on foundry-fabricated transistors and few-electron quantum dots, showing that industry fabrication is a viable route towards quantum computation at a scale large enough to begin addressing the most challenging computational problems.
Currently, radio frequency (RF) measurement setups for semiconductor qubits are implemented with high performance discrete devices operating at cryogenic temperatures, and the output signals are detected by room temperature instruments.This is impractical for a real quantum processor, and integrated circuits (ICs) should be designed for spin qubit readout in a practical quantum computer, to ensure system reliability and compactness.To guide the system-level IC design, we analyze in this work noise specifications of RF front-end circuits for qubit readout, mainly focusing on noise figure (NF) of the lownoise-amplifier (LNA) and phase noise (PN) of the voltage-controlled-oscillator (VCO).RF reflectometry and RF dispersive gate sensing (DGS) are two main spin qubit readout techniques, both of which should detect weak reflected signals as low as -135 dBm and distinguish <1% amplitude or phase variation, which results in high sensitivity and low noise requirements for the readout circuits, to achieve the high measurement fidelity.For the analysis, we model the RF reflectometry and RF-DGS as demodulators respectively of the on-off keying (OOK) signal and phase modulated (PM) signal from qubits.From this, we provide a first estimation of the required NF and PN for a given fidelity and readout bandwidth, as well as an insight into the relationship between phase resolution of RF-DGS and performance degradation due to PN of the VCO.We then review some state-of-the-art CMOS LNA and VCO topologies, which can be utilized in the spin qubit readout ICs to satisfy the specifications.