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IEEE Transactions on Applied Superconductivity

Long-term Changes in Parameters for Nb-based Superconducting Digital Circuits

Mutsuo Hidaka, Shuichi Nagasawa

Published Jan 1, 2025• 0 citations
Publisher

Abstract

The same process evaluation chips for Nb-based superconducting digital circuits were measured at liquid He temperature (4 K) just after fabrication and after storage at room temperature for up to 16 years. The critical current (Ic) of the Josephson junction (JJ), resistance, inductance, and Icof the Nb–Nb contacts before and after storage were compared. Icdecreased by around 5% and resistance increased about 2% after 10 years. Neither change depended on JJ area or resistor width. Therefore, we concluded they were changes in critical current density (Jc) and sheet resistance (Rsq). Because Jcdid not change in the chip thermally annealed just after fabrication, we concluded that the long-term Jcchanges were caused by the same mechanism as thermal annealing. Although the long-term change in Jcis not critical for superconducting digital circuit operation, it could cause circuit malfunctions in some cases. Therefore, some measures are required, such as light annealing after fabrication or cold storage. The effect of the resistance change on superconducting digital circuit operation was small. No inductance changes were observed. Icof Nb–Nb contacts decreased by several tens of percent over 10 years but was still sufficient for the digital circuits to function.

DOI
10.1109/tasc.2025.3583012

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The same process evaluation chips for Nb-based superconducting digital circuits were measured at liquid He temperature (4 K) just after fabrication and after storage at room temperature for up to 16 years. The critical current (Ic) of the Josephson junction (JJ), resistance, inductance, and Icof the Nb–Nb contacts before and after storage were compared. Icdecreased by around 5% and resistance increased about 2% after 10 years. Neither change depended on JJ area or resistor width. Therefore, we concluded they were changes in critical current density (Jc) and sheet resistance (Rsq). Because Jcdid not change in the chip thermally annealed just after fabrication, we concluded that the long-term Jcchanges were caused by the same mechanism as thermal annealing. Although the long-term change in Jcis not critical for superconducting digital circuit operation, it could cause circuit malfunctions in some cases. Therefore, some measures are required, such as light annealing after fabrication or cold storage. The effect of the resistance change on superconducting digital circuit operation was small. No inductance changes were observed. Icof Nb–Nb contacts decreased by several tens of percent over 10 years but was still sufficient for the digital circuits to function.
We present electrical characterization data of sputtered Nb/a-Si/Nb Josephson junctions (JJs) for high-speed and high-density superconducting circuits. Junctions were studied with critical current densities (Jc) ranging from 0.01 to 3 mA/μm2 at 4 K. For junctions deposited at room temperature and processed to a maximum temperature of 150 °C, the dependence of Jc on barrier thickness d is exponential, Jc∝exp (−d/d0), with d0 constant over the entire range of Jc values studied. Junctions were annealed at temperatures up to 300 °C to study changes in their electrical properties and possible compatibility with high temperature fabrication processes. Current–voltage characteristics, critical current uniformity, critical current modulation with in-plane magnetic field, and sub-gap resistance behavior of these junctions were measured at 4 K and demonstrate that the junction properties do not degrade with annealing. These data indicate that Nb/a-Si/Nb JJs are a potential candidate for higher speed and higher density superconducting circuits.
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Abstract Josephson superconducting qubits and parametric amplifiers are prominent examples of superconducting quantum circuits that have shown rapid progress in recent years. As such devices become more complex, the requirements for reproducibility of their electrical properties across a chip are being tightened. Critical current of the Josephson junction Ic is the essential electrical parameter in a chip. So, its variation is to be minimized. According to the Ambegaokar–Baratoff formula, critical current is related to normal-state resistance, which can be measured at room temperature. In this study, we focused on the dominant source of non-uniformity for the Josephson junction critical current–junction area variation. We optimized Josephson junction fabrication process and demonstrated resistance variation of 9.8–4.4% and 4.8–2.3% across 22 × 22 mm2 and 5 × 10 mm2 chip areas, respectively. For a wide range of junction areas from 0.008 to 0.12 μm2, we ensure a small linewidth standard deviation of 4 nm measured over 4500 junctions with linear dimensions from 80 to 680 nm. We found that the dominate source of junction area variation limiting Ic{\mathrm{I}}_{\mathrm{c}}Ic​ I c reproducibility is the imperfection of the evaporation system. The developed fabrication process was tested on superconducting highly coherent transmon qubits (T1 > 100 μs) and a nonlinear asymmetric inductive element parametric amplifier.
This review provides a current overview of the fabrication processes for superconducting digital circuits at CRAVITY (clean room for analog and digital superconductivity) at the National Institute of Advanced Industrial Science and Technology (AIST), Japan. CRAVITY routinely fabricates superconducting digital circuits using three types of fabrication processes and supplies several thousand chips to its collaborators each year. Researchers at CRAVITY have focused on improving the controllability and uniformity of device parameters and the reliability, which means reducing defects. These three aspects are important for the correct operation of large-scale digital circuits. The current technologies used at CRAVITY permit ±10% controllability over the critical current density (Jc) of Josephson junctions (JJs) with respect to the design values, while the critical current (Ic) uniformity is within 1σ=2% for JJs with areas exceeding 1.0 µm2 and the defect density is on the order of one defect for every 100,000 JJs.
Understanding the aging behavior of Josephson junctions and the effect of annealing on junction resistances is important in building large-scale superconducting quantum processors. Here we study the effects of aging of Al/AlOx/Al Josephson junctions under different storage conditions from immediately after fabrication up to 2 to 3 months. We find that the aging curve follows a logarithmic curve, with the aging amplitude mainly determined by fabrication conditions and the aging rate determined by both fabrication and storage conditions. Junctions stored at ambient laboratory conditions aged faster compared to junctions stored in a nitrogen atmosphere or vacuum, with the aging speed appreciably changes when the storage condition changed. We also compared the effect of thermal annealing under nitrogen environment with annealing under ambient conditions up to 250∘^\circ∘C. We find that under nitrogen environment, the resistances decreased at all temperatures tested, while under ambient environment the resistances increased at 200∘^\circ∘C and decreased at 250∘^\circ∘C instead. We were unable to decrease the resistance below the initial-time resistance, suggesting a lower limit on the range of resistance tuning.
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