IEEE International Conference on Quantum Computing and Engineering (QCE)
The Quantum Interface Controller: A Full-Stack, Modular, and Scalable System for Qubit Readout and Manipulation
Luis Eduardo Ardila-Perez, Marvin Fuchs, R. Gartmann, Lukas Scheller, Mario Schlösser, Roger Heil, Christian Roth, Ilja Bekman, Markus Jerger, R. Barends, Stefan van Waasen, Oliver Sander
Quantum computing has the potential to revolutionize computation by solving complex problems in a way that classical computers cannot. However, robust and scalable qubit manipulation and control electronics are needed to exploit this potential. Academic efforts in this area are sparse, especially in terms of scalability to hundreds or thousands of qubits. The mod-ular and scalable Quantum Interface Controller (QiController), a room-temperature qubit control architecture, addresses this gap. It is implemented using the Advanced Telecommunications Computing Architecture (ATCA) and its dual-dual star topology. The system has two boards: a “Hub” with an AMD Xilinx RFSoC and a “Node” with peripheral FPGAs and DACs for low-latency flux control. This paper describes the system architecture and firmware developments for multi-board synchronization.
Quantum computing has the potential to revolutionize computation by solving complex problems in a way that classical computers cannot. However, robust and scalable qubit manipulation and control electronics are needed to exploit this potential. Academic efforts in this area are sparse, especially in terms of scalability to hundreds or thousands of qubits. The mod-ular and scalable Quantum Interface Controller (QiController), a room-temperature qubit control architecture, addresses this gap. It is implemented using the Advanced Telecommunications Computing Architecture (ATCA) and its dual-dual star topology. The system has two boards: a “Hub” with an AMD Xilinx RFSoC and a “Node” with peripheral FPGAs and DACs for low-latency flux control. This paper describes the system architecture and firmware developments for multi-board synchronization.
Quantum Computing is a rapidly growing field, where room-temperature control electronics have become a major bottleneck for scalability, particularly in academic environments, where open control stacks and cost-effectiveness are essential. In this paper, we present initial results of our approach to scaling multiple instances of the Quantum Interface Controller (QiController), a control and readout electronic stack developed at the Karlsruhe Institute of Technology. We outline key concepts such as low-latency communication and clock synchronization required for a scalable architecture leveraging an ATCA-based platform, validate these concepts through several demonstrator setups, and present promising preliminary results. We also discuss the remaining challenges in developing a fully scalable system.
Quantum bit control systems using room temperature electronics provide universities and research institutions a cost-effective entry into quantum computing. Various approaches address the need for straightforward qubit controllers, particularly those based on AMD's next-generation RFSoC FPGA, which integrate adaptive SoCs with internal ADCs and DACs. As superconducting qubit architectures advance to incorporate flux elements for direct Z axis control and the number of qubits grows, the demand for high-quality and numerous control channels increases. This paper explores the requirements for integrating and expanding the QiController electronics from Karlsruhe Institute of Technology. The new system includes up to ten cards capable of driving a total of 240 direct flux lines. Our joint system design leverages the modularity, scalability, and thermal management of the industrial Standard ATCA, ensuring robust performance and ease of maintenance in this multi-FPGA setup. Initial unit tests of the electronics show improvements in noise levels and quality, suggesting that future verification on real qubit devices could establish this approach as a viable solution for scalable room-temperature control hardware.
Quantum computers will be a revolutionary extension of the heterogeneous computing world. They consist of many quantum bits (qubits) and require a careful design of the interface between the classical computer architecture and the quantum processor. For example, even single nanosecond variations of the interaction may have an influence on the quantum state. Designing a tailored interface electronics is therefore a major challenge, both in terms of signal integrity with respect to single channels, as well as the scaling of the signal count. We developed such an interface electronics, an RFSoC-based qubit control system called QiController. In this article, we present the modular FPGA firmware design of our system. It features so-called digital unit cells, or QiCells. Each cell contains all the logic necessary to interact with a single superconducting qubit, including a custom-built RISC-V-based sequencer. Synchronization and data exchange between the cells is facilitated using a special star-point structure. Versatile routing and frequency-division multiplexing of generated signals between QiCells and converters are also supported. High-level programmability is provided using a custom Python-based description language and an associated compiler. We furthermore provide the resource utilization of our design and demonstrate its correct operation using an actual superconducting five-qubit chip.
A scalable control architecture for superconducting quantum processors is essential as the number of qubits increases and coherent multi-qubit operations span beyond the capacity of a single control module. The Quantum Instrumentation Control Kit (QICK), built on AMD RFSoC platforms, offers a flexible open-source framework for pulse-level qubit control but lacks native support for multi-board synchronization, limiting its applicability to mid- and large-scale quantum devices. To overcome this limitation, we introduce Manarat, a scalable multi-board control platform based on QICK that incorporates hardware, firmware, and software enhancements to enable sub-100 ps timing alignment across multiple AMD ZCU216 RFSoC boards. Our system integrates a low-jitter clock distribution network, modifications to the tProcessor, and a synchronization scheme to ensure deterministic alignment of program execution across boards. It also includes a custom analog front-end for flux control that combines high-speed RF signals with software-programmable DC biasing voltages generated by a low-noise, high-precision DAC. These capabilities are complemented by a software stack capable of orchestrating synchronized multi-board experiments and fully integrated with the open-source Qibo framework for quantum device calibration and algorithm execution. We validate Manarat on a 10-qubit superconducting processor controlled by two RFSoC boards, demonstrating reliable execution of synchronized control sequences for cross-board CZ gate calibration. These results confirm that sub-nanosecond synchronization and coherent control are achievable across multiple RFSoC boards, enabling scalable operation of superconducting quantum computers.
Quantum error correction (QEC) is essential for realizing large-scale, fault-tolerant quantum computation, yet its practical implementation remains a major engineering challenge. In particular, QEC demands precise real-time control of a large number of qubits and low-latency, high-throughput and accurate decoding of error syndromes. While most prior work has focused primarily on decoder design, the overall performance of any QEC system depends critically on all its subsystems including control, communication, and decoding, as well as their integration.
To address this challenge, we present an open-source, fully integrated QEC system built on RISC-Q, a generator for RISC-V-based quantum control architectures. Implemented on RFSoC FPGAs, our system prototype integrates real-time qubit control, a scalable distributed multi-board architecture, and the state-of-the-art hardware QEC decoder within a low-latency, high-throughput decoding pipeline, forming a complete hardware platform ready for deployment with superconducting qubits.
Experimental evaluation on a three-board prototype based on AMD ZCU216 RFSoCs demonstrates an end-to-end QEC decoding-feedback latency of 446 ns for a distance-3 surface code, including syndrome aggregation, network communication, syndrome decoding, and error distribution. Extrapolating from measured subsystem performance and state-of-the-art decoder benchmarks, the architecture can achieve sub-microsecond decoding-feedback latency up to a distance-21 surface code ($\sim$881 physical qubits) when scaled to larger hardware configurations.
Quantum computing has made significant strides, with hardware platforms now advanced enough to tackle the challenges of scaling up to larger and more robust systems. Central to this progression is the interface between quantum processors, comprising isolated qubits, and the classical systems required for their control and readout. As these systems transition from few-qubit devices to fault-tolerant architectures, the complexity of this quantum-classical interaction poses significant engineering challenges. Field-Programmable Gate Arrays (FPGAs) have emerged as an adaptable and efficient solution, offering realtime control, low-latency operations, and seamless integration. This review delves into current FPGA-based platforms, including commercial systems, as well as open-source solutions developed by academic research groups. The architecture, features, and contributions of these platforms to addressing scalability and integration issues are thoroughly examined. Additionally, the review highlights innovations in cryogeniccompatible controllers and explores the potential of Cryo-FPGAs to reduce noise and improve fidelity in quantum systems. By providing a comprehensive analysis of current technologies and identifying opportunities for advancement, this review offers valuable insights for researchers and engineers working to develop scalable quantum computing solutions.