IEEE International Conference on Quantum Computing and Engineering (QCE)
Scalable Room Temperature Control Electronics for Advanced High-Fidelity Qubit Control
Mario Schloesser, Luis Eduardo Ardila-Perez, R. Gartmann, Lukas Scheller, Marvin Fuchs, Oliver Sander, Roger Heil, Christian Roth, Ilja Bekman, Markus Jerger, R. Barends, Stefan van Waasen
Quantum bit control systems using room temperature electronics provide universities and research institutions a cost-effective entry into quantum computing. Various approaches address the need for straightforward qubit controllers, particularly those based on AMD's next-generation RFSoC FPGA, which integrate adaptive SoCs with internal ADCs and DACs. As superconducting qubit architectures advance to incorporate flux elements for direct Z axis control and the number of qubits grows, the demand for high-quality and numerous control channels increases. This paper explores the requirements for integrating and expanding the QiController electronics from Karlsruhe Institute of Technology. The new system includes up to ten cards capable of driving a total of 240 direct flux lines. Our joint system design leverages the modularity, scalability, and thermal management of the industrial Standard ATCA, ensuring robust performance and ease of maintenance in this multi-FPGA setup. Initial unit tests of the electronics show improvements in noise levels and quality, suggesting that future verification on real qubit devices could establish this approach as a viable solution for scalable room-temperature control hardware.
Quantum bit control systems using room temperature electronics provide universities and research institutions a cost-effective entry into quantum computing. Various approaches address the need for straightforward qubit controllers, particularly those based on AMD's next-generation RFSoC FPGA, which integrate adaptive SoCs with internal ADCs and DACs. As superconducting qubit architectures advance to incorporate flux elements for direct Z axis control and the number of qubits grows, the demand for high-quality and numerous control channels increases. This paper explores the requirements for integrating and expanding the QiController electronics from Karlsruhe Institute of Technology. The new system includes up to ten cards capable of driving a total of 240 direct flux lines. Our joint system design leverages the modularity, scalability, and thermal management of the industrial Standard ATCA, ensuring robust performance and ease of maintenance in this multi-FPGA setup. Initial unit tests of the electronics show improvements in noise levels and quality, suggesting that future verification on real qubit devices could establish this approach as a viable solution for scalable room-temperature control hardware.
Quantum computing has the potential to revolutionize computation by solving complex problems in a way that classical computers cannot. However, robust and scalable qubit manipulation and control electronics are needed to exploit this potential. Academic efforts in this area are sparse, especially in terms of scalability to hundreds or thousands of qubits. The mod-ular and scalable Quantum Interface Controller (QiController), a room-temperature qubit control architecture, addresses this gap. It is implemented using the Advanced Telecommunications Computing Architecture (ATCA) and its dual-dual star topology. The system has two boards: a “Hub” with an AMD Xilinx RFSoC and a “Node” with peripheral FPGAs and DACs for low-latency flux control. This paper describes the system architecture and firmware developments for multi-board synchronization.
Quantum Computing is a rapidly growing field, where room-temperature control electronics have become a major bottleneck for scalability, particularly in academic environments, where open control stacks and cost-effectiveness are essential. In this paper, we present initial results of our approach to scaling multiple instances of the Quantum Interface Controller (QiController), a control and readout electronic stack developed at the Karlsruhe Institute of Technology. We outline key concepts such as low-latency communication and clock synchronization required for a scalable architecture leveraging an ATCA-based platform, validate these concepts through several demonstrator setups, and present promising preliminary results. We also discuss the remaining challenges in developing a fully scalable system.
A scalable control architecture for superconducting quantum processors is essential as the number of qubits increases and coherent multi-qubit operations span beyond the capacity of a single control module. The Quantum Instrumentation Control Kit (QICK), built on AMD RFSoC platforms, offers a flexible open-source framework for pulse-level qubit control but lacks native support for multi-board synchronization, limiting its applicability to mid- and large-scale quantum devices. To overcome this limitation, we introduce Manarat, a scalable multi-board control platform based on QICK that incorporates hardware, firmware, and software enhancements to enable sub-100 ps timing alignment across multiple AMD ZCU216 RFSoC boards. Our system integrates a low-jitter clock distribution network, modifications to the tProcessor, and a synchronization scheme to ensure deterministic alignment of program execution across boards. It also includes a custom analog front-end for flux control that combines high-speed RF signals with software-programmable DC biasing voltages generated by a low-noise, high-precision DAC. These capabilities are complemented by a software stack capable of orchestrating synchronized multi-board experiments and fully integrated with the open-source Qibo framework for quantum device calibration and algorithm execution. We validate Manarat on a 10-qubit superconducting processor controlled by two RFSoC boards, demonstrating reliable execution of synchronized control sequences for cross-board CZ gate calibration. These results confirm that sub-nanosecond synchronization and coherent control are achievable across multiple RFSoC boards, enabling scalable operation of superconducting quantum computers.
Quantum computation has been a major focus of research in the past two decades, with recent experiments demonstrating basic algorithms on small numbers of qubits. A large-scale universal quantum computer would have a profound impact on science and technology, providing a solution to several problems intractable for classical computers. To realise such a machine, today's small experiments must be scaled up, and a system must be built which provides control and measurement of many hundreds of qubits. A device of this scale is challenging: qubits are highly sensitive to their environment, and sophisticated isolation techniques are required to preserve the qubits' fragile states. Solid-state qubits require deep-cryogenic cooling to suppress thermal excitations. Yet current state-of-the-art experiments use room-temperature electronics which are electrically connected to the qubits. This thesis investigates various scalable technologies and techniques which can be used to control quantum systems. With the requirements for semiconductor spin-qubits in mind, several custom electronic systems, to provide quantum control from deep cryogenic temperatures, are designed and measured. A system architecture is proposed for quantum control, providing a scalable approach to executing quantum algorithms on a large number of qubits. Control of a gallium arsenide qubit is demonstrated using a cryogenically operated FPGA driving custom gallium arsenide switches. The cryogenic performance of a commercial FPGA is measured, as the main logic processor in a cryogenic quantum control system, and digital-to-analog converters are analysed during cryogenic operation. Recent work towards a 100-qubit cryogenic control system is shown, including the design of interconnect solutions and multiplexing circuitry. With qubit fidelity over the fault-tolerant threshold for certain error correcting codes, accompanying control platforms will play a key role in the development of a scalable quantum machine.
Today’s quantum computing systems rely on commercial electronics operating at room temperature in order to perform control and readout operations for qubits [1] –[6]. The qubits operate at cryogenic temperatures; the signals that support control and readout of qubits therefore traverse multiple temperature stages in a dilution refrigerator to enable interaction with the qubits of a quantum computer. For many of the most advanced quantum computers built to date, the control of each individual qubit demands application of a radiofrequency pulse that is precisely calibrated in frequency, amplitude, and phase. Oubit readout demands the amplification of very low amplitude signals that are then post-processed to categorize the state of the qubit being measured. Oubit control electronics are implemented using arbitrary waveform generators (AWGs) of various types. The scalability of such systems is challenged by the need to scale the number of qubit control electronics units linearly with the number of qubits in the system. One approach to mitigating this challenge that is under active exploration is the use of multi-channel AWGs (tailored to the requirements of qubit control) that operate at the 4K stage of a quantum computing system [7] –[10]. Oubit readout electronics are typically implemented using multiple stages of amplification and then DSP-based readout performed at room temperature. In today’s systems, while readout electronics benefits from multiplexing of the readout signals (enabling a single cascade of moderately wideband amplifiers to support the delivery of multiple readout signals to the room-temperature electronics), again, the scalability of this approach is challenged much as is the case with control electronics. One approach to mitigating the readout challenge is the expanded use of cryogenic electronics in the readout chain. Success in the implementation of cryogenic control and readout solutions depends critically on multiple CMOS sub-components; in this paper we focus on SRAM and low noise amplifiers (LNAs). Note that SRAM is critical for both control and readout applications as a mixed-signal solution involving the combination of a custom processor and analog elements is highly desirable in both cases. Further, while the LNA is directly used as an element in the readout chain, a deep assessment of LNA performance and opportunities strongly benefits overall understanding of achievable noise performance in CMOS technologies at cryogenic temperatures and is therefore impoitant in both control and readout contexts.
Abstract Realizing a practically useful superconducting quantum computer will require a dramatic scale-up of quantum control electronics to meet the growth in required qubit counts. Conventional rack-based room-temperature control electronics impose severe constraints on wiring density, cost, and system footprint, creating a barrier to large-scale and fault-tolerant quantum computing. Here we demonstrate a hybrid quantum control architecture that combines cryogenic complementary metal-oxide semiconductor (cryo‑CMOS) application-specific integrated circuits (ASICs) for two‑qubit flux control with room‑temperature radio‑frequency electronics for single‑qubit control and readout. The resulting system achieves high density and scalable quantum control without compromising two‑qubit gate fidelity. Deployed on a 156‑qubit quantum processor, the cryo-CMOS subsystem achieves two‑qubit gate errors at the {10}^{-3} level, with a best randomized benchmarking error per gate of 8.4\times{10}^{-4}, stable operation over multi‑day timescales, and no measurable performance degradation as we increase the temperature of the cryo-CMOS ASICs from 7 to 20 K. Thermal analysis identifies cryo-CMOS chip operation near 20 K as a favorable regime, enabling efficient cooling of a large number of channels per cryostat. Compared against rack‑based flux-control, the cryo-CMOS subsystem achieves statistically indistinguishable two-qubit gate fidelities under matched gate settings and enables a tenfold improvement in system spatial footprint. These results establish cryo‑CMOS flux control as a practical and scalable foundation for large‑scale and fault-tolerant superconducting quantum systems.