In this work we have presented design for scalability (DFS) for compiling dynamic quantum circuits in order to execute them on centralized monolithic or distributed environment. Dynamic quantum circuits allow the usage of mid-circuit measurement, active reset and classically controlled quantum operations for circuit designs. Since, quantum algorithms solving practical complex problems involve thousands of qubits that a targeted computing environments may not provide, it has become crucial to seek for schemes that enable dynamic circuit realization of such algorithms using less number of qubits to make them executable on the selected hardware platforms. To this end we have considered two different quantum circuits representing Bernstein–Vazirani Algorithm (BVA) and Variational Quantum Circuit (VQC) for deep Q network, and two computing environments, monolithic and distributed for framing our design solutions. For the monolithic environment we have shown that using only two qubits dynamic version of both these BVA and VQC are achievable. In the distributed environment with quantum communication channel being in place, the corresponding distributed design are also obtained by employing one or more such communication channels. We have also shown that even with structural similarities between the worst-case BVA (featuring a secret string of all 1s) and the VQC, the design alternatives might differ depending on the noise level of the chosen distributed hardware platform.
In this work we have presented design for scalability (DFS) for compiling dynamic quantum circuits in order to execute them on centralized monolithic or distributed environment. Dynamic quantum circuits allow the usage of mid-circuit measurement, active reset and classically controlled quantum operations for circuit designs. Since, quantum algorithms solving practical complex problems involve thousands of qubits that a targeted computing environments may not provide, it has become crucial to seek for schemes that enable dynamic circuit realization of such algorithms using less number of qubits to make them executable on the selected hardware platforms. To this end we have considered two different quantum circuits representing Bernstein–Vazirani Algorithm (BVA) and Variational Quantum Circuit (VQC) for deep Q network, and two computing environments, monolithic and distributed for framing our design solutions. For the monolithic environment we have shown that using only two qubits dynamic version of both these BVA and VQC are achievable. In the distributed environment with quantum communication channel being in place, the corresponding distributed design are also obtained by employing one or more such communication channels. We have also shown that even with structural similarities between the worst-case BVA (featuring a secret string of all 1s) and the VQC, the design alternatives might differ depending on the noise level of the chosen distributed hardware platform.
The execution of large-scale quantum algorithms is currently constrained by the limited number of available qubits, qubit connectivity restrictions, and the inherent noise in quantum processors. To address these limitations, a design methodology known as Dynamic Quantum Circuits (DQC) has emerged. DQC leverages non-unitary operations-such as active reset, midcircuit measurement, and classically controlled gate operationsto reduce qubit requirements during circuit design. Recently, DQC-based implementations have been explored for various algorithms, including Shor’s Prime Factorization, Quantum Phase Estimation (QPE), and Bernstein-Vazirani (BV), as well as for key operations like state preparation, Toffoli networks, and nonlocal gates. While DQC offers a significant reduction in qubit usage, it introduces a trade-off in the form of increased circuit depth. Therefore, assessing the reliability of such circuits becomes crucial in the context of current quantum hardware architectures. In this paper, we analyze the reliability of DQC-based quantum circuit realizations as a function of qubit count and circuit depth. We present empirical results for two algorithms and evaluate how architectural parameters impact their reliability.
Dynamic quantum circuits (DQCs) provide a hardware-efficient route to quantum computing by reducing physical-qubit overhead and compressing circuit topology through mid-circuit measurements, qubit reset and reuse, and classical feed-forward control. Here, we demonstrate the advantages of DQCs on a single hybrid superconducting qubit-cavity processor by implementing a hierarchy of algorithms with increasing complexity. This hybrid architecture consists of a high-dimensional cavity qudit serving as the computational register and a dispersively coupled superconducting transmon ancilla that is repeatedly measured, reset, and reused to enable dynamic control. Using this device, we implement a 10-bit Bernstein-Vazirani algorithm with an average success probability of 82%, surpassing state-of-the-art dynamic and static implementations in both scale and performance; an 8-bit quantum phase-estimation protocol with estimation errors below 10-3; and the first dynamic-circuit implementation of Shor's algorithm on a superconducting platform, factoring 15 over all coprime bases with squared statistical overlap values above 99.8%. These results provide concrete benchmarks for future DQC implementations and highlight the versatile advantages of DQCs with the hybrid qubit-qudit architecture, establishing it as a promising route toward scalable, programmable quantum computation.
Dynamic quantum circuits with mid-circuit measurements (MCMs) and feed-forward operations play a crucial role in various applications, such as quantum error correction and quantum algorithms. With advancements in quantum hardware enabling the implementation of MCM and feed-forward loops, the use of dynamic circuits has become increasingly prevalent. There is a significant need for a benchmarking framework specially designed for dynamic circuits to capture their unique properties, as current benchmarking tools are designed primarily for unitary circuits and cannot be trivially extended to dynamic circuits. We propose dynamarq, a scalable and hardware-agnostic benchmarking framework for dynamic circuits. We collect a set of dynamic circuit benchmarks spanning various applications and propose a broad set of circuit features to characterize the structure of these dynamic circuits. We run them on two IBM quantum processors and the Quantinuum Helios-1E emulator, and propose scalable, application-dependent fidelity scores for each benchmark based on hardware execution results. We perform statistical modeling to identify correlations between circuit features and fidelity scores, and demonstrate highly accurate fidelity prediction using our model. Our model parameters are also transferable across hardware backends and calibration cycles. Our framework facilitates the understanding of dynamic circuit structures and provides insights for designing and optimizing dynamic circuits to achieve high execution fidelity on quantum hardware.
Recent advances in fault tolerant quantum systems allow to perform non-unitary operations like mid-circuit measurement, active reset and classically controlled gate operations in addition to the existing unitary gate operations. Real quantum devices that support these non-unitary operations enable us to execute a new class of quantum circuits, known as Dynamic Quantum Circuits (DQC). This helps to enhance the scalability, thereby allowing execution of quantum circuits comprising of many qubits by using at least two qubits. Recently DQC realizations of multi-qubit Quantum Phase Estimation (QPE) and Bernstein-Vazirani (BV) algorithms have been demonstrated in two separate experiments. However the dynamic transformation of complex quantum circuits consisting of Toffoli gate operations have not been explored yet. This motivates us to: (a) explore the dynamic realization of Toffoli gates by extending the design space of DQC for Toffoli networks, and (b) propose a general dynamic transformation algorithm for the first time to the best of our knowledge. More precisely, we introduce two dynamic transformation schemes (dynamic-1 and dynamic-2) for Toffoli gates, that differ with respect to the required number of classically controlled gate operations. For evaluation, we consider the Deutsch-Jozsa (DJ) algorithm composed of one or more Toffoli gates. Experimental results demonstrate that dynamic DJ circuits based on dynamic-2 Toffoli realization scheme provides better computational accuracy over the dynamic-1 scheme. Further, the proposed dynamic transformation scheme is generic and can also be applied to non-Toffoli quantum circuits, e.g. BV algorithm.
Scaling quantum computers, i.e., quantum processing units (QPUs) to enable the execution of large quantum circuits is a major challenge, especially for applications that should provide a quantum advantage over classical algorithms. One approach to scale QPUs is to connect multiple machines through quantum and classical channels to form clusters or even quantum networks. Using this paradigm, several smaller QPUs can collectively execute circuits that each would not be able on its own. However, communication between QPUs is costly as it requires generating and maintaining entanglement, and hence it should be used wisely. In this paper, we evaluate the architectures, and in particular the entanglement patterns, of variational quantum circuits in a distributed quantum computing (DQC) setting. That is, using Qiskit, we simulate the execution of an eight qubit circuit using four QPUs each with two computational and two communication qubits where non-local CX-gates are performed using the remote-CX protocol. We compare the performance of various circuits on a binary classification task where training is executed under ideal and testing under noisy conditions. The study provides initial results on suitable VQC architectures for the DQC paradigm, and indicates that a standard VQC baseline is not always the best choice, and alternative architectures that use entanglement between QPUs sparingly deliver better results under noise.
This paper investigates the design and implementation of dynamically reconfigurable quantum circuits, a crucial step towards realizing truly adaptive quantum computation. The core concept involves utilizing programmable quantum hardware alongside machine learning techniques to monitor and respond to the evolving demands of a quantum algorithm during its execution. Traditional quantum circuit design typically relies on static topologies, leading to inefficiencies and limitations in handling unforeseen complexities or errors. This work proposes a system where circuit topology – specifically gate selection and qubit routing – is adjusted in real-time based on predictive analysis of computational bottlenecks. The primary mechanism leverages machine learning models trained to identify performance bottlenecks and subsequently trigger reconfiguration. This dynamic adaptation allows for optimized resource utilization, enhanced error correction capabilities, and ultimately, the potential for achieving superior performance compared to pre-designed, static circuits. The presented framework represents a significant departure from conventional quantum circuit design, paving the way for algorithms that can intrinsically adapt to their environment, significantly improving the prospects for practical quantum computation.