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Micro and Nanosystems

Utilization of Two Cross Two Switch for Bitonic Sorting Circuit

Subhasree Bhattacharjee, Soumyadip Sarkar, Kunal Das, Arindam Sadhu, Bikramjit Sarkar

Published Sep 27, 2024• 1 citation
Publisher

Abstract

Background: The synthesis of reversible logic has gained prominence as a crucial research area, particularly in the context of post-CMOS computing devices, notably quantum computing. Objective: To implement the bitonic sorting circuit, 2x2 switch, is used. The overarching objective of implementing a reversible sorting circuit is to mitigate power consumption while promising secure communication. The successful implementation of the bitonic sorting circuit utilizing the proposed 2x2 switch is validated through simulations conducted in IBM Qiskit. Methods: This study begins by employing the control swap gate to implement a 2x2 switch, aimed at enabling concurrent computing operations within multiprocessor systems to enhance throughput. Subsequently, following the successful implementation of the 2x2 switch, the study proceeds to design a bitonic sorting circuit. Results: Bitonic sort using a 2x2 switch on the IBM Quantum Experience (IBMQ) platform via the QISKit SDK in Python 3.6. Specifically, Qiskit v0.29.0 is utilized, with OpenQASM. OpenQASM serves as the quantum assembly and instruction language. Conclusion: This work presents a methodology for constructing a 2x2 switch, utilizing a reversible control swap gate as its core component. Additionally, it demonstrates the intricate development and implementation of a bitonic sorting circuit, capitalizing on this innovative switch architecture.

DOI
10.2174/0118764029314915240828170217

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Background: The synthesis of reversible logic has gained prominence as a crucial research area, particularly in the context of post-CMOS computing devices, notably quantum computing. Objective: To implement the bitonic sorting circuit, 2x2 switch, is used. The overarching objective of implementing a reversible sorting circuit is to mitigate power consumption while promising secure communication. The successful implementation of the bitonic sorting circuit utilizing the proposed 2x2 switch is validated through simulations conducted in IBM Qiskit. Methods: This study begins by employing the control swap gate to implement a 2x2 switch, aimed at enabling concurrent computing operations within multiprocessor systems to enhance throughput. Subsequently, following the successful implementation of the 2x2 switch, the study proceeds to design a bitonic sorting circuit. Results: Bitonic sort using a 2x2 switch on the IBM Quantum Experience (IBMQ) platform via the QISKit SDK in Python 3.6. Specifically, Qiskit v0.29.0 is utilized, with OpenQASM. OpenQASM serves as the quantum assembly and instruction language. Conclusion: This work presents a methodology for constructing a 2x2 switch, utilizing a reversible control swap gate as its core component. Additionally, it demonstrates the intricate development and implementation of a bitonic sorting circuit, capitalizing on this innovative switch architecture.
Abstract Reversible logic synthesis is becoming a significant research component for post-CMOS computing devices, particularly quantum computing. In this work we connect the reversible logic synthesis problem to sorting algorithms. Reversible logic has emerged as a promising technology in recent years, with applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical gates AND, OR, and XOR are not reversible. This paper employs the control swap gate to implement a 2x2 switch. In multiprocessor system different computing operations are performed concurrently to get higher throughput. Sorting network can be used to tie up different parts of a large complex system efficiently with least amount of hardware to perform concurrent operations. A sorting network can be built using a multiple input and multiple output switching network. Following the implementation of the 2x2 switch, a bitonic sorting circuit is designed. The goal of developing a reversible sorting circuit is to reduce power consumption while maintaining reliable communication. The bitonic sorting circuit was successfully implemented, and the output was simulated in IBM qiskit. This presents efficient sorting circuit that can sort binary numbers in ascending/descending order.
The emergence of quantum computers in the last decade has generated research interest in applications such as quantum sorting. Quantum sorting plays a critical role in creating ordered sets of data that can be better utilized, e.g., quantum ordered search or quantum network switching. In this paper, we propose a quantum sorting algorithm that combines highly parallelizable bitonic merge networks with perfect shuffle permutations (PSP), for sorting data represented in the quantum domain. The combination of bitonic networks with PSP improves the temporal complexity of bitonic merge sorting which is critical for reducing decoherence effects for quantum processing. We present space-efficient quantum circuits that can be used for quantum bit comparison and permutation. We also present a reconfigurable hardware quantum emulator for prototyping the proposed quantum algorithm. The emulator has a fully-pipelined architecture and supports double-precision floating-point computations, resulting in high throughput and accuracy. The proposed hardware architectures are implemented on a high-performance reconfigurable computer (HPRC). In our experiments, we emulated quantum sorting circuits of up to 31 fully-entangled quantum bits on a single FPGA node of the HPRC platform. To the best of our knowledge, our effort is the first to investigate a reconfigurable hardware emulation of quantum sorting using bitonic networks and perfect shuffle.
Quantum logic gates are fundamental building blocks of quantum computing, enabling the manipulation of quantum bits (qubits) for computations and communications. This paper presents a novel approach to implementing the SWAP gate, a crucial two-qubit quantum operation, using Python programming. The SWAP gate facilitates the exchange of quantum states between two qubits and plays a significant role in qubit routing and circuit optimization. The implementation leverages Python's quantum computing libraries, such as Qiskit, to simulate and validate the functionality of the SWAP gate. Numerical simulations demonstrate the successful operation of the gate and its integration into larger quantum circuits. The paper provides a comprehensive guide for Python-based SWAP gate development, contributing to the advancement of quantum algorithm design and for different applications in quantum computing.
The sorting network is crucial in fields like communication switching, data mining, image processing, neural networks, and others, where the bitonic sorting network (BSN) is an efficient comparison sorting method. It uses the compare-and-swap (CAS) units to compare two input data and decide whether to swap them. The single flux quantum (SFQ) circuits are well known for their high-speed operation and low power consumption, but they are less effective at performing numerical comparisons in CAS units. To address this issue, the unary coding (UC) method, an entropy encoding method that represents the natural number n with n ones followed by zeros, is introduced to implement a smaller SFQ-based BSN. The UC requires only AND and OR gates for CAS unit implementation. Consequently, the 8-input 32-bit UC BSN is two orders of magnitude smaller than the conventional SFQ binary coding BSN with the same precision and achieves approximately 3.3 times better energy efficiency. Additionally, compared to the CMOS-based UC BSN circuit, the energy efficiency improves by 5.8 times, even considering the cooling cost (×400). We also implemented a 4-input BSN circuit, using the 1.0 μm 10-layer Nb SFQ circuit fabrication process, and verified its operation at low speed.
Quantum computing is an emerging computational paradigm that represents and processes information using quantum states. This paper presents the implementation and simulation of a Quantum Half Adder using the IBM Qiskit framework. The proposed circuit performs one-bit binary addition and produces two outputs, SUM and CARRY, through reversible quantum operations. Classical input values are encoded into quantum states using Pauli-X gates. Controlled-NOT (CNOT) gates are used to realize the XOR relationship required for SUM generation, while a Toffoli (CCNOT) gate realizes the AND relationship required for CARRY generation. The complete design is implemented in Python and executed using the Qiskit Aer Simulator. Four possible input combinations are evaluated and the measured outputs are compared with the expected Half Adder truth table. Circuit visualization, terminal output, and measurement histograms are used to verify the operation. The results show that the simulated circuit produces the expected SUM and CARRY values for all input combinations. The work provides a simple practical model for understanding reversible quantum computation, quantum gates, and Qiskit-based quantum circuit simulation.
Quantum computing is at the leading edge of advanced technology that uses quantum phenomena such as entanglement and super position to solve complex problems. One of the main application is to built comparator circuit to do arithmetic operations at stipulated time. Based on this our research is to propose the design and implementation of one-bit and two-bit quantum comparators using IBM Qiskit, which is formly compared with classical comparator. Also this work represents a comprehensive overview of the techniques required to optimize and design quantum comparator circuits using real quantum simulators. The results obtained from simulation promises the comparison accuracy with classical results. From the circuit designed it is inferred that the hardware complexity is very much reduced compared to classical comparator, which are tabulated in terms of number of quantum gates. The proposed method can further be extended to generate higher order comparator circuits. These results may form the basis for further research and development that will support the advancement of quantum computing and algorithms.