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International Conference on Communications

Fast List Decoding of High-Rate Polar Codes Based on Minimum-Combinations Sets

Yang Lu, Ming-Min Zhao, Ming Lei, Yunlong Cai, Minjian Zhao

Published Jun 9, 2024• 2 citations
Publisher

Abstract

Being able to provide excellent error-correction performance for polar codes with short-to-moderate code length, successive-cancellation list (SCL) is regarded as one of the most promising decoding algorithms. However, the application of SCL decoding in low-latency communication scenarios is limited due to its sequential nature. Recently, fast list decoding algorithms are proposed by considering special nodes with low code rates. Aiming at achieving further speedup for SCL decoding, this paper presents fast list decoding algorithms for two types of high-rate special nodes, namely single-parity-check (SPC) and sequence rate-1(SRI) nodes, based on the minimum-combinations set (MCS) which is able to significantly narrow the search space of candidate paths. Typically, SPC nodes can be directly decoded within one round of path splitting procedure, whereas SR1 nodes, as a group of parallel SPC nodes, can also be decode efficiently. Simulation results show that the proposed fast SCL decoder is able to reduce the decoding latency by 68.4% as compared to the state of the art, without any error-correction performance degradation.

DOI
10.1109/icc51166.2024.10622649

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Due to the ability to provide superior error-correction performance, the successive cancellation list (SCL) algorithm is widely regarded as one of the most promising decoding algorithms for polar codes with short-to-moderate code lengths. However, the application of SCL decoding in low-latency communication scenarios is limited due to its sequential nature. To reduce the decoding latency, developing tailored fast and efficient list decoding algorithms of specific polar constituent codes (special nodes) is a promising solution. Recently, fast list decoding algorithms are proposed by considering special nodes with low code rates. Aiming to further speedup the SCL decoding, this paper presents fast list decoding algorithms for two types of high-rate special nodes, namely single-parity-check (SPC) nodes and sequence rate one or single-parity-check (SR1/SPC) nodes. In particular, we develop two classes of fast list decoding algorithms for these nodes, where the first class uses a sequential decoding procedure to yield decoding latency that is linear with the list size, and the second further parallelizes the decoding process by pre-determining the redundant candidate paths offline. Simulation results show that the proposed list decoding algorithms are able to achieve up to 70.7% lower decoding latency than state-of-the-art fast SCL decoders, while exhibiting the same error-correction performance.

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Being able to provide excellent error-correction performance for polar codes with short-to-moderate code length, successive-cancellation list (SCL) is regarded as one of the most promising decoding algorithms. However, the application of SCL decoding in low-latency communication scenarios is limited due to its sequential nature. Recently, fast list decoding algorithms are proposed by considering special nodes with low code rates. Aiming at achieving further speedup for SCL decoding, this paper presents fast list decoding algorithms for two types of high-rate special nodes, namely single-parity-check (SPC) and sequence rate-1(SRI) nodes, based on the minimum-combinations set (MCS) which is able to significantly narrow the search space of candidate paths. Typically, SPC nodes can be directly decoded within one round of path splitting procedure, whereas SR1 nodes, as a group of parallel SPC nodes, can also be decode efficiently. Simulation results show that the proposed fast SCL decoder is able to reduce the decoding latency by 68.4% as compared to the state of the art, without any error-correction performance degradation.
Due to the ability to provide superior error-correction performance, the successive cancellation list (SCL) algorithm is widely regarded as one of the most promising decoding algorithms for polar codes with short-to-moderate code lengths. However, the application of SCL decoding in low-latency communication scenarios is limited due to its sequential nature. To reduce the decoding latency, developing tailored fast and efficient list decoding algorithms of specific polar constituent codes (special nodes) is a promising solution. Recently, fast list decoding algorithms are proposed by considering special nodes with low code rates. Aiming to further speedup the SCL decoding, this paper presents fast list decoding algorithms for two types of high-rate special nodes, namely single-parity-check (SPC) nodes and sequence rate one or single-parity-check (SR1/SPC) nodes. In particular, we develop two classes of fast list decoding algorithms for these nodes, where the first class uses a sequential decoding procedure to yield decoding latency that is linear with the list size, and the second further parallelizes the decoding process by pre-determining the redundant candidate paths offline. Simulation results show that the proposed list decoding algorithms are able to achieve up to 70.7% lower decoding latency than state-of-the-art fast SCL decoders, while exhibiting the same error-correction performance.
Compared with the bit-wise successive cancellation list (SCL) decoding of polar codes, the node-based Fast SCL decoding significantly reduces the decoding latency by identifying special constituent codes and decoding these in parallel. To further reduce the latency of current Fast SCL decoders, we first propose a fast sequence repetition (SR) node-based SCL (Fast SR-SCL) decoding algorithm, which only involves one type of node in the SCL decoding tree. Furthermore, we employ the adaptive path splitting (APS) strategy to terminate the path splitting in the SR node early, without degrading the error-correcting performance. Numerical results show that for 5G uplink codes with a length of 1024 and rates of 1/4, 1/2, and 3/4, our decoder can deliver the same decoding performance while reducing the average latency by 34.5%, 38.0%, and 39.6% compared with the state-of-the-art Fast SCL decoder for a list size L = 8.
Successive-Cancellation List (SCL) decoding of Polar codes, supported by a Cyclic Redundancy Check, achieves a distinguished error-correction performance at the cost of a high decoding complexity. The parallel decoding of constituent Single Parity Check (SPC) nodes of a Polar factor tree relevantly contributes to the implementation costs of high-throughput, deeply pipelined SCL decoding architectures. In this paper, we present algorithms to reduce the number of considered candidates in SPC nodes. For this purpose, we adapt the partial order-based Rate-1 node candidate generation algorithm to the constraints in SPC nodes and deduce a low-complexity algorithm suitable for efficient hardware implementation. Simulation results show that the presented algorithms preserve the error-correction performance with reduced hardware implementation costs. Additionally, an extended threshold in the candidate selection enables a trade-off between error-correction and implementation costs by a further reduction of the considered candidates. Furthermore, Application-Specific Integrated Circuit (ASIC) implementations of the optimized node and three decoders with a code length of 128 in a 28 nm technology are presented. Regarding area efficiency and energy efficiency, improvements of up to 350.8 % and 84.7 % are achieved for the single SPC node with its sorter, while the presented SCL decoder implementations with list size 8 outperform a state-of-the-art reference decoder by up to 32.4 % and 32.0 %, respectively.
The successive-cancellation list (SCL) and successive-cancellation flip (SCF) decoding can be used to improve the performance of polar codes, especially for short to moderate length codes. However, their serial decoding nature results in significant decoding latencies. Implementing some operations in parallel can reduce their decoding latencies. This paper presents fast implementations of the SCL and SCF decoders. In particular, we propose fast parallel list decoders for five newly identified types of nodes in the decoding tree of a polar code, which significantly improves the decoding latency. We also present novel fast SCF decoders that decode some special nodes in the decoding tree of a polar code without serially computing bit log-likelihood ratios. Using our proposed fast parallel SCF decoders, we observed an improvement up to 81% with respect to the original SCF decoder. This significant reduction in the decoding latency is observed without sacrificing the bit-error-rate performance of the code.
In the case of short code, polar code demonstrates superior performance compared with Low Density Parity Check (LDPC) code. Particularly in low coding rate scenario, the complexity of Polar code encoding and decoding is significantly lower than that of LDPC code. The technological advantage of Polar code makes it of great value in special application scenarios such as satellite communication and ocean communication. The polar coding scheme can significantly improve the transmission reliability of the communication system, because the satellite spread spectrum communication system generally adopts short code design.In the research of decoding algorithm, the original Serial Cancellation (SC) decoding algorithm has simple rules, but the decoding effect is not ideal under the limited code length, and the serial decoding mechanism leads to large decoding delay. The Successive Cancellation List (SCL) decoding algorithm improves decoding performance by increasing the number of decoding search path. However, maintaining multiple decoding paths can multiply the decoding complexity. Fast node-based decoding algorithm aims to accelerate decoding and reduce latency by defining and simplifying the decoding process for specific nodes, yet they do not optimize the decoding paths. In view of the above problems, this paper proposes a Simplified Parity Check-based Cyclic Redundancy Check (CRC)-Aided Successive Cancellation List (S-PC-CASCL) decoding algorithm. Simulation results demonstrate that the proposed S-PC-CASCL maintains excellent error correction performance while reducing the average list size by up to 16 % under low Signal Noise Ratio (SNR) conditions, thereby lowering computational complexity and decoding latency compared with other widely used polar decoding methods.
Polar codes are the first family of error-correcting codes that can achieve channel capacity. Among the known decoding algorithms, Successive-Cancellation List (SCL) decoding supported by a Cyclic Redundancy Check (CRC) shows the best error-correction performance at the cost of a high decoding complexity. The decoding of Rate-1 nodes belongs to the most complex tasks in SCL decoding. In this paper, we present a new algorithm that largely reduces the number of considered candidates in a Rate-1 node and generate all required candidates in parallel. For this purpose, we use a partial order of the candidate paths to prove that only a specified number of candidates needs to be considered. Further complexity reductions are achieved by an extended threshold-based path exclusion scheme at the cost of negligible error-correction performance loss. We present detailed Application-Specific Integrated Circuit (ASIC) implementation data on a 28 nm Fully Depleted Silicon on Insulator (FD-SOI) Complementary Metal-Oxide-Semiconductor (CMOS) technology for decoders with code length 128. We show that the new decoders outperform state-of-the-art reference decoders. For list size 8, improvements of up to 158.8% and 62.5% in area and energy efficiency are observed, respectively.