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Superconductor Science and Technology

Characterization of high-speed writing and reading operations of the superconducting memory cell

Yue Wang, Xianghai Zhong, Junwen Zeng, Yinping Pan, Denghui Zhang, Shujie Yu, Ling Wu, Lu Zhang, Wei Peng, Jie Ren, Lei Chen, Zhen Wang

Published Aug 19, 2024• 2 citations
Publisher

Abstract

Abstract Superconducting memory cells that use flux quanta as their storage medium can achieve ultra-fast access times with ultra-low power consumption. However, the data signal generated by a flux quantum memory (FQM) cell is usually too weak and too fast to be measured directly. Here, we present a method to characterize the real-time operation of an FQM cell. The storage loop of the FQM cell, configured with a Nb/NbN X /Nb Josephson junction, was proven the capability to store multiple flux quanta. The readout was demonstrated by a superconducting quantum interference device composed of underdamped Nb/Al-AlO X /Nb Josephson junctions. The writing and reading operations were achieved by a short pulse ranging from 0.1 ns to 2.5 ns, and a constant bit error rate of ∼2.46% was measured for the fabricated FQM cell. The method presented here can be used to study real-time operation of an FQM cell in a direct manner.

DOI
10.1088/1361-6668/ad70dc

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Abstract Superconducting memory cells that use flux quanta as their storage medium can achieve ultra-fast access times with ultra-low power consumption. However, the data signal generated by a flux quantum memory (FQM) cell is usually too weak and too fast to be measured directly. Here, we present a method to characterize the real-time operation of an FQM cell. The storage loop of the FQM cell, configured with a Nb/NbN X /Nb Josephson junction, was proven the capability to store multiple flux quanta. The readout was demonstrated by a superconducting quantum interference device composed of underdamped Nb/Al-AlO X /Nb Josephson junctions. The writing and reading operations were achieved by a short pulse ranging from 0.1 ns to 2.5 ns, and a constant bit error rate of ∼2.46% was measured for the fabricated FQM cell. The method presented here can be used to study real-time operation of an FQM cell in a direct manner.
The design and experimental results for a novel type of Josephson memory cell are presented. The cell has a simpler construction than the conventional Henkels-type, using a one-junction SQUID (superconducting quantum interference device) capacitively coupled to a single junction. Binary data are stored as single flux quanta and are destructively read out by sensing a pulse caused by a vortex-mode transition. Computer simulations suggest that the read operation could be performed with a bias margin for the sense junction of +or-28% and that the rise time of the sense current in a 16-bit memory cell would be as fast as 30 ps, despite having to sense a vortex-mode transition. Results are presented for a memory cell fabricated with Nb-AlO/sub x/-Nb junctions.>
The talk is based on an overview which was published recently (1). For this reason, only an abstract is given here, which includes Later results not contained in the aforementioned overview. The presently-known Josephson memory cells store information as persistent currents in superconducting loops, or what is equivalent as a magnetic flux in the area of the ring. This method of storage is nonvolatile and has no power consumption in the storing state. In a superconducting ring system, the magnetic flux is quantized, and cells have been built which operate either with only one flux quantum, or with many of them. For the Latter cells with many flux quanta (ring cells), quite a number of designs exist. They have one or two Josephson junctions in the ring, which allow writing. An external junction which is controlled by the ring current serves for non-destructive reading of the information. The smallest cell realized had an area of 900 ?m2 with a 2 ?m minimum line width. Switching speed was ? 80 ps. Cells which store information as a single-flux quantum (single flux-quantum cells = SFQ cells) in the ring, usually contain two Josephson junctions used for reading and writing. Read-out in most of these cells is destructive, but methods of reading non-destructively have also been proposed. The smallest device made had an area of ? 150 ?m2 with a minimum line width of 2 ?m. The read signal had a rise time ? 100 ps.
A proposal vortex transitional nondestructive read-out Josephson memory cell is successfully fabricated and tested. The memory cell consists of two superconducting loops in which a single flux quantum is stored and a two-junction interferometer gate as a sense gate. The memory cell employs vortex transitions in the superconducting loops for writing and reading data. The vortex transitional memory operation of the cell contributes to improving its sense discrimination and operating margin. The memory cell is activated by two control signals without timing control signals. Memory cell chips have been fabricated using a niobium planarization process. A±21% address signal current margin and a ±33% sense gate current margin have been obtained experimentally. Successful memory operations of a cell driven by two-junction interferometer gates has been demonstrated. The single flux quantum operations of this memory cell makes it an attractive basic element for a high-speed cache memory.
Abstract Superconducting flux memory devices fabricated with nanoscale junctions and high-inductance materials can maintain high-speed access performance while significantly reducing the area required for superconducting loops. In this work, we present a method for preparing nanoscale NbN-based superconductor/normal-metal/superconductor (SNS) Josephson junctions that combines electron beam lithography with chemical mechanical planarization process. Scanning electron microscope images reveal that the junction has a very round shape, while cross-sectional transmission electron microscopy shows that it has a truncated cone structure, characterized by a narrow top and a wide bottom. The minimum diameter of the junction is 51 nm, with the diameter at the interface between the wiring layer and the top electrode being just 27 nm. These nanoscale junctions exhibit excellent Josephson properties with a critical current density J c of 673 ± 64 kA cm −2 and a characteristic voltage V c of 1.63 ± 0.45 mV at 4.2 K. Furthermore, we designed the superconducting memory cell based on the simulated inductance values of the NbN loop and the nanoscale NbN-based SNS junctions. The cell has a total area of 12.6 μ m × 6.5 μ m and contains a radio-frequency superconducting quantum interference device with one junction in the storage loop and a direct-current superconducting quantum interference device with two junctions in the readout loop. Using the flux-locked and feedback measurement method, a clear flux hysteresis curve can be obtained to verify the read-write functions of the device.
We measured the static error rate of a high-Tc superconductor dc superconducting quantum interference device (SQUID), which, in the form as a storage loop for single flux quanta, is a basic element of rapid single flux quantum circuits. Using high-Tc multilayer bicrystal technology, we fabricated a stacked dc SQUID pair, one SQUID serving as the storage loop, the other one as the readout device. The escape rate of a stored flux quantum was measured as a function of the bias current at a temperature of 28 K. The measured error rates were in good agreement with a model calculation based on thermally activated barrier crossing.
Superconductor electronics offers logic circuits for high-speed data processing and high-performance computing. The main barrier to practical application is the lack of high-speed and low-power memory. It is widely believed that the most reliable and functional bit cell for superconducting memory is the vortex transitional bit cell, which was successfully used by Nagasawa in a 4-kb memory. This paper reviews existing challenges in this type of Josephson memory devices and discusses engineering issues in implementing a model single flux quantum random access memory. We evaluate the contributions that various components of the memory system make to delay and power dissipation. The 256-bit memory provides an experimentally confirmed read access time of 190 ps. As a result, we found that delay and power dissipation are found largely in the address decoder, line drivers, bit-selection scheme, and the data readout circuitry. With these circuits being similar for various magnetic memory devices, our findings provide essential data for a comprehensive assessment of new concepts for bit cells, readout, and write in superconducting memories.