Cryogenic temperatures are crucial for the operation of semiconductor quantum electronic devices, yet the heating effects induced by microwave or laser signals used for quantum state manipulation can lead to significant temperature variations at the nanoscale. Therefore, probing the temperature of individual devices in working conditions and understanding the thermodynamics are paramount for designing and operating large-scale quantum computing systems. In this study, we demonstrate high-sensitivity fast thermometry in a silicon nanotransistor at cryogenic temperatures using RF reflectometry. Through this method, we explore the thermodynamic processes of the nanotransistor during and after a laser pulse and determine the dominant heat dissipation channels in the few-kelvin temperature range. These insights are important to understand thermal budgets in quantum circuits, with our techniques being compatible with microwave and laser radiation, offering a versatile approach for studying other quantum electronic devices in working conditions.
Cryogenic temperatures are crucial for the operation of semiconductor quantum electronic devices, yet the heating effects induced by microwave or laser signals used for quantum state manipulation can lead to significant temperature variations at the nanoscale. Therefore, probing the temperature of individual devices in working conditions and understanding the thermodynamics are paramount for designing and operating large-scale quantum computing systems. In this study, we demonstrate high-sensitivity fast thermometry in a silicon nanotransistor at cryogenic temperatures using RF reflectometry. Through this method, we explore the thermodynamic processes of the nanotransistor during and after a laser pulse and determine the dominant heat dissipation channels in the few-kelvin temperature range. These insights are important to understand thermal budgets in quantum circuits, with our techniques being compatible with microwave and laser radiation, offering a versatile approach for studying other quantum electronic devices in working conditions.
Thousands to millions of sensitive signals will need to be conveyed through all the temperature stages of a dilution fridge to operate future large-scale quantum processors made of many quantum bits. The exploding number of heat-conductive coaxial cables will overwhelm the fridge cooling capabilities, detrimental to the quantum core. Moving the control electronics down to cryogenic temperatures allows the use of already-available superconducting cables, alleviating heat conduction between low-temperature stages, and appears as a clear path towards scalability in the number of operating qubits.This Ph.D. work aimed to explore the use of the industrial CMOS 28nm Fully-Depleted Silicon-On-Insulator (FD-SOI) technology at cryogenic temperatures for quantum computing applications. Our first objective is to extend the sparse existing knowledge about the FD-SOI 28nm transistors at cryogenic temperatures for practical aspects of circuit design and later for developments of compact models.To speed-up the characterization of single devices with the inherent hour-long cooling cycles, we designed an integrated circuit multiplexing a thousand of transistors for different geometries and gate-stack flavors for low-frequency measurement of the current-voltage characteristics and pair-matching analysis from 300 down to 0.1K. We discuss and analyze the evolution trends with varying geometry at different temperatures for important quantities in circuit design, such as the transconductance, the conductance, and the transconductance over drain current ratio of individual transistors.Secondly, we explore the low-temperature co-integration and the full on-chip integration of semiconductor quantum devices with classical electronics aimed at specific measurements down to the millikelvin range.We first focus on the sub-nanoampere current measurement of quantum dot devices by designing and characterizing a low-power transimpedance amplifier (TIA). The high-gain amplifier is successfully applied to measure the current across single- and double quantum-dot devices, respectively wire-bonded a few mm away or on-chip integrated a few micrometers-away. To further leverage the integration into the same substrate, we connected GHz-range voltage-controlled oscillators to one of the gates of the double dot in an attempt to observe discrete charge pumping in a fully-integrated device.Lastly, we tackled the measurement of the gate capacitance of single quantum devices by proposing a new measurement scheme making use of the cryogenic electronics capabilities as an alternative to the well-known reflectometry. By integrating a voltage-controlled current excitation and a voltage-sensing amplifier in the 200 MHz range, both in close proximity to the quantum device connected to an LC tank, the read-out circuitry of a variation in the device capacitance becomes a purely lumped-element system with impedance measurement of the resonant circuit without any wave propagation like in reflectometry. This approach increases simplicity and compactness of the measurement set-up. We even replace the bulky passive inductor used in reflectometry by an active inductor made of transistors and capacitors, offering improved scalability with a 3-orders of magnitude lower area for the same inductance. The resulting circuit successfully measured aF-capacitance variations of nanometric transistors at 4.2K revealing oscillatory quantum effects in the gate capacitance as a function of the gate and back-gate voltages.At the end of this dissertation, a picture is given with the challenges laying ahead related to circuit architecture and design for the ultimate goal of entering into the era of large-scale quantum processing.
Radio-frequency (RF) reflectometry is widely used for high-bandwidth readout of semiconductor quantum devices at cryogenic temperatures, but its application has mainly been limited to nanoscale structures with relatively small capacitances. Here, we investigate RF readout in a different regime by applying gate-based reflectometry to a large-area silicon carbide transistor with parasitic capacitances orders of magnitude larger than those of typical quantum devices, conditions normally expected to hinder RF readout. We observe a gate-dependent RF response which degrades and eventually vanishes as temperature is lowered, although MOSFET operation in DC transport is maintained down to deep cryogenic temperatures. We attribute this behaviour to impedance changes introduced by carrier freeze-out in the transistor drift region, and propose a modified circuit configuration designed to restore sensitivity under these conditions. These results establish how parasitic pathways and device geometry can limit RF readout, providing insight into the design of scalable cryogenic-CMOS quantum systems.
A cryogenic quantum dot thermometer is calibrated and operated using only a single non-galvanic gate connection. The thermometer is probed with radio-frequency reflectometry and calibrated by fitting a physical model to the phase of the reflected radio-frequency signal taken at temperatures across a small range. Thermometry of the source and drain reservoirs of the dot is then performed by fitting the calibrated physical model to new phase data. The thermometer can operate at the transition between thermally broadened and lifetime broadened regimes, and outside the temperatures used in calibration. Electron thermometry was performed at temperatures between 3.0K and 1.0K, in both a 1K cryostat and a dilution refrigerator. The experimental setup allows fast electron temperature readout with a sensitivity of 4.0±0.3mK/Hz, at Kelvin temperatures. The non-galvanic calibration process gives a readout of physical parameters, such as the quantum dot lever arm. The demodulator used for reflectometry readout is readily available and very affordable.
Understanding the temporal and spatial dependence of temperature is critical in high-performance cryogenic devices. Typical thermometry techniques struggle to simultaneously combine high bandwidth, sensitivity and on-chip integration, limiting their ability to measure fast intra-device thermal fluctuations. Here, we demonstrate a time-resolved thermometry platform based on TiN kinetic inductance resonators integrated in a 22 nm FDSOI chip. By tracking temperature-dependent shifts in the resonant frequency, we achieve sub-millikelvin temperature sensitivity down to temperatures of 100 mK. Time-resolved on-chip pulsed heating experiments as a function of distance reveal an onset delay, consistent with a quasi-ballistic heat propagation velocity of 3.9 ± 0.1 mm μs−1. We also show that elevated temperatures increase net thermal conductance, shortening thermal relaxation times across all spatial separations. This behaviour manifests in two distinct regimes: a substrate-limited regime at 100 mK, where cooling rates vary with heater distance, and a Kapitza boundary-limited regime at 400 mK, where thermal relaxation becomes more spatially uniform. These measurements demonstrate kinetic inductance thermometry's ability to rapidly probe non-equilibrium temperature dynamics in cryogenic devices such as quantum processors.
Electron-spin qubits hosted in silicon are a promising platform for quantum computing, since in recent years operation and readout fidelities have exceeded the fault tolerant threshold. Now the manufacturing techniques used to fabricate these devices have to be scaled up. To enable scaling the number of qubits beyond 1000, the quantum processor needs to be integrated with local control electronics. However, the heat dissipated by operation of these electronic control circuits can negatively affect qubit performance. In this work, I develop a primary temperature sensor based on a quantum dot, to monitor the qubit temperature under varying conditions. Real-time monitoring of the local temperature can be used to study the impact of on-chip dissipated heat on the qubit. These sensors are used to define a power budget for integrated electronics. Furthermore, a simple thermal model is developed to predict thermal transport in a quantum chip. This methodology is universal and can be applied to any qubit platform with a local temperature sensor. Finally, I compare the performance of this quantum dot thermometer against other cryogenic thermometers and find this primary thermometer is more sensitive than other common thermometry techniques. To reduce the number of control lines required to control individual qubits, I investigate the use of a 3D microwave resonator to deliver a global oscillating magnetic field to control electron spin qubits. When using the resonator to rotate electron spins, no spin flips are detected. This is attributed to a significant decrease in resonator quality factor which originates from materials with a different thermal contraction. This leads to a misalignment of the two sapphire ring oscillators making up the resonator. Despite this, I’ve used these experiments to characterize various types of charge sensors, and I have identified the RF-SET and RF-SEB as the best sensors for near term applications.
Quantum computing promises an exponential speed-up of computation compared to what is nowadays achievable with classical computers. In this way, it enables the evaluation of more complex models and the breaching of current security algorithms. For the operation of a quantum system, many questions remain to be answered. Currently, there are several quantum technologies that promise to be both reliable and scalable, two features required for large scale quantum operations. Common to all technologies is the operating temperature that needs to be close to absolute zero, i.e. below 100 mK, to suppress environment noise and allow the quantum properties to become 'visible'. In order for any quantum processor to be operated, a so-called quantum-classical interface is required for the quantum bit (qubit) read-out and control. This interface consists of various electronic blocks, such as analog-to-digital converters, digital-to-analog converters, mixers, amplifiers and a digital controller. Especially the analog blocks require effort to meet the noise and stability constraints as not to disturb the very sensitive qubits and allow reading of the tiny signals. As the qubits live in extremely deep-cryogenic temperatures, long wires interface the cryogenic with the room temperature environment, where most of the electronics is situated. However, for a scalable system, heat injection becomes a serious problem, with many wires between 300 K and sub-Kelvin. Furthermore, such amount of interconnects is challenging to mechanically place in a dilution refrigerator. Therefore, in this work, we propose to implement the electronics not at room temperature, but at a temperature much closer to the qubits, for example at 4 K. This not only reduces significantly the wiring between room temperature and the qubits, but we can also benefit from lower electronic noise at such a temperature. The operation of conventional electronics almost 200°C below its normal temperature range is not trivial as device properties alter significantly and most circuits no longer operate as intended. In CMOS processes, the main technology in the integrated electronics world, the behaviour of the transistors, required for the implementation of any circuit, deviates considerably at low temperatures. The transistor's threshold voltage goes up, the mobility increases and the subthreshold slope becomes steeper, to name just a few of these deviations. Although there are improvements in performance, there are also some counter effects, and characterization of the transistors is needed to observe the changes. Once devices are characterized at such low temperatures, new models can be built and circuits can be simulated and adapted to operate properly at cryogenic temperatures. Luckily, there are various commercially available devices that can already withstand the chills of cold. We demonstrated various commercially available devices, such as a field-programmable gate array (FPGA) implemented in a 28 nm CMOS process, to be operating without major concerns at 4~K. Its properties alter only slightly, within 5 to 10%, and all tested circuit implementations, working at 300~K, also worked at 4 K. We combined both commercially available devices, that operate 200 K below their specified temperature range, with custom designed CMOS circuits to implement a cryogenic read-out platform for spin qubits. This system comprises amplifiers, an ADC, an FPGA, voltage regulators and a clock generator. It allows to amplify the tiny signal from the qubits and digitize it directly in the FPGA in order to process the data locally at 4~K. This system is one of the first systematic attempts at operating a part of the quantum-classical interface at cryogenic temperatures and forms the basis for future systems comprising the complete electronic interface for qubits to operate at such low temperatures. One of the main problems to tackle for cryogenic electronic systems is their power consumption. Power budgets are simply limited to roughly 1 or 2 Watts at 4 K and exponentially lower at deeper cryogenic temperatures, thus limiting the size of large-scale electronic systems. Our approach of combined commercial and custom circuits will have to be steadily replaced by a single (custom) technology that meets both power and scalability constraints. One of the best candidates is CMOS, a technology that the industry has relied upon for several decades and benefits from many optimizations thanks to Moore's law.