Contemporary quantum computers with tens to hundreds of physical quantum bits (qubits) are susceptible to quantum noise. As a result, running quantum circuits on these computers is error prone. In particular, deep quantum circuits with a large number of quantum gates and qubits are more likely to fail on quantum computers. In this work, we propose a design for the quantum arithmetic division operation which runs successfully on contemporary quantum computers. A quantum division circuit is needed for realization of quantum algorithms in scientific and image processing applications. While there have been a limited number of prior works on quantum division, none of them can be implemented on quantum computers due to excessive circuit complexity. We propose a different design that exploits dynamic circuits and approximate computing to deploy a quantum division circuit in quantum computers. The dynamic circuit is a new feature in recent quantum computers for midcircuit measurement in hardware. We exploit this feature to reduce the number of qubits and increase the fidelity of quantum division. We also exploit approximate computing to overcome noise in quantum hardware. We carefully tune the scope of approximation in our circuits to offer an acceptable level of accuracy. We run our division circuit on an IBM quantum computer and show that our circuit overcomes quantum noise and generates meaningful results.
Contemporary quantum computers with tens to hundreds of physical quantum bits (qubits) are susceptible to quantum noise. As a result, running quantum circuits on these computers is error prone. In particular, deep quantum circuits with a large number of quantum gates and qubits are more likely to fail on quantum computers. In this work, we propose a design for the quantum arithmetic division operation which runs successfully on contemporary quantum computers. A quantum division circuit is needed for realization of quantum algorithms in scientific and image processing applications. While there have been a limited number of prior works on quantum division, none of them can be implemented on quantum computers due to excessive circuit complexity. We propose a different design that exploits dynamic circuits and approximate computing to deploy a quantum division circuit in quantum computers. The dynamic circuit is a new feature in recent quantum computers for midcircuit measurement in hardware. We exploit this feature to reduce the number of qubits and increase the fidelity of quantum division. We also exploit approximate computing to overcome noise in quantum hardware. We carefully tune the scope of approximation in our circuits to offer an acceptable level of accuracy. We run our division circuit on an IBM quantum computer and show that our circuit overcomes quantum noise and generates meaningful results.
Noisy intermediate-scale quantum (NISQ) computers face significant reliability challenges because they are vulnerable to quantum noise, which severely limits their fidelity in quantum applications. In particular, deep circuits with a large number of quantum gates are susceptible to errors as they are more likely to lose their states in a deep circuit. In this paper, we propose a quantum circuit for square root operation that generates correct results on NISQ devices. The square root operation is used in many applications such as complex number computations, computer graphics, etc. While there have been limited studies on quantum square root circuits, none of them can be implemented on NISQ devices. In this work, we simplify the structure of an exact quantum square root circuit and reduce the number of quantum gates. The proposed design reduces the complexity of the square root circuit while maintaining the same level of precision in outputs. In addition, we exploit approximate computing to simplify the circuit further and run it on a real quantum computer. Approximate computing is used in classical computers to enhance the power and/or performance in exchange for accuracy. We exploit approximate computing for a different purpose, which is reducing the depth as well as the number of quantum gates in the square root circuit. To validate the effectiveness of our approach, we conduct experiments on an IBM quantum computer, where our circuit produces meaningful results. Furthermore, we present examples of error-resilient applications to demonstrate the validity of our approximate circuit.
Near-term quantum computers have been built as intermediate-scale quantum devices and are fragile against quantum noise effects, namely, NISQ devices. Traditional quantum-error-correcting codes are not implemented on such devices and to perform quantum computation in good accuracy with these machines we need to develop alternative approaches for mitigating quantum computational errors. In this work, we propose quantum error mitigation (QEM) scheme for quantum computational errors which occur due to couplings with environments during gate operations, i.e., decoherence. To establish our QEM scheme, first we estimate the quantum noise effects on single-qubit states and represent them as groups of quantum circuits, namely, quantum-noise-effect circuit groups. Then our QEM scheme is conducted by subtracting expectation values generated by the quantum-noise-effect circuit groups from those obtained by the quantum circuits for the quantum algorithms under consideration. As a result, the quantum noise effects are reduced, and we obtain approximately the ideal expectation values via the quantum-noise-effect circuit groups and the numbers of elementary quantum circuits composing them scale polynomial with respect to the products of the depths of quantum algorithms and the numbers of register bits. To numerically demonstrate the validity of our QEM scheme, we run noisy quantum simulations of qubits under amplitude damping effects for four types of quantum algorithms. Furthermore, we implement our QEM scheme on IBM Q Experience processors and examine its efficacy. Consequently, the validity of our scheme is verified via both the quantum simulations and the quantum computations on the real quantum devices. Our QEM scheme is solely composed of quantum-computational operations (quantum gates and measurements), and thus, it can be conducted by any type of quantum device. In addition, it can be applied to error mitigation for many other types of quantum noise effects as well as noisy quantum computing of long-depth quantum algorithms.
Quantum circuits for mathematical functions such as division are necessary to use quantum computers for scientific computing. Quantum circuits based on Clifford+T gates can easily be made fault-tolerant but the T gate is very costly to implement. The small number of qubits available in existing quantum computers adds another constraint on quantum circuits. As a result, reducing T-count and qubit cost have become important optimization goals. The design of quantum circuits for integer division has caught the attention of researchers and designs have been proposed in the literature. However, these designs suffer from excessive T gate and qubit costs. Many of these designs also produce significant garbage output resulting in additional qubit and T gate costs to eliminate these outputs. In this work, we propose two quantum integer division circuits. The first proposed quantum integer division circuit is based on the restoring division algorithm and the second proposed design implements the non-restoring division algorithm. Both proposed designs are optimized in terms of T-count, T-depth and qubits. Both proposed quantum circuit designs are based on (i) a quantum subtractor, (ii) a quantum adder-subtractor circuit, and (iii) a novel quantum conditional addition circuit. Our proposed restoring division circuit achieves average T-count savings from 79.03 to 91.69 percent compared to the existing works. Our proposed non-restoring division circuit achieves average T-count savings from 49.22 to 90.03 percent compared to the existing works. Further, both our proposed designs have linear T-depth. We also illustrate the application of the proposed quantum division circuits in quantum image processing with a case study of quantum bilinear interpolation.
Abstract Quantum arithmetic circuits, such as adders and multipliers, are essential for many quantum algorithms, but their practical deployment on noisy intermediate-scale quantum (NISQ) devices remains challenging due to limited coherence times and high gate error rates. In this paper, we propose Qaradox, a configurable approximate quantum multiplier architecture that achieves higher computation accuracy than its exact counterpart under realistic quantum noise. The proposed architecture introduces a novel class of controlled quantum adders that enable flexible combinations of exact, approximate, and truncated operations, allowing the quantum circuit to be tailored to hardware-specific noise characteristics. Experimental results using IBM’s 127-qubit Brisbane noise model show that Qaradox reduces the error rate (ER), normalized mean error distance (NMED), and mean relative error distance (MRED) by up to 23.7%, 80.3%, and 88.1%, respectively, compared to the fully exact multiplier. Furthermore, when applied to image sharpening, the proposed architecture improves peak signal-to-noise ratio (PSNR) by more than three times and increases structural similarity index measure (SSIM) from 0.00 to 0.83, effectively recovering visual quality lost in exact designs. These results demonstrate that approximation, when applied structurally and selectively, can enhance both robustness and correctness in quantum arithmetic for NISQ-era systems.
Abstract Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting for compilation error and circuit noise, we demonstrate that time evolution and quantum Fourier transformation circuits achieve high compression rates, while random quantum circuits are less compressible. The degree of compression is related to the rate of entanglement accumulation in the target circuit. In particular, experiments on IBM platforms achieve a compression rate of 12.5 for N=12, significantly extending the application of current quantum devices. Furthermore, large-scale numerical simulations for system sizes up to N=30 reveal that the optimal depth dmax to achieve maximal overall fidelity is independent of system size N, suggesting the scalability of our method for large quantum devices in terms of quantum resources.
Quantum computing is an emerging technology that combines the principles of both computer science and quantum mechanics to solve computationally challenging problems significantly faster than the current classical computers. In this thesis, a proof of concept to generate hardware-executable quantum circuits for Noisy Intermediate-Scale Quantum (NISQ) devices that follow the paradigm of approximate computing is presented. We adopt a multi-level optimization approach and consider the placement of native quantum gates that can be physically implemented on one of the existing quantum systems (IBM, Rigetti) as a circuit topology optimization problem and the adjustment of parameters of these native quantum gates as a continuous design optimization problem. The outer topology problem is solved with the aid of a genetic algorithm, whereas the gradient-descent method is used for the inner design optimization. Our approach starts from the reference circuit and transforms it into an executable circuit with tunable parameters by replacing the high-level quantum operations with a set of approximate decompositions, e.g., single qubit rotation quantum gates or a combination of single qubit rotation gates (matrix multiplication). Later, the inner design optimization ensures that the circuit created is tuned to be executed to achieve an expectation value close to that of the reference circuit. This is complemented by compiler-based optimizations to further reduce or aggregate the quantum gates of the optimized circuit. This three-step pipeline is embedded into an outer genetic algorithm framework that inspects many different circuit designs (the approximate-decomposition replacements are by no means unique) and returns a set of unique approximate quantum circuits that can be executed on hardware. We have tested our circuit generation approach for superconducting quantum systems such as IBM and Rigetti hardware for many different benchmark circuits such as Quantum Fourier Transform, Toffoli, quantum adder, multi-controlled operations and three oracle-based algorithms, namely, Grover's search algorithm, Deutsch and Bernstein-Vazirani algorithm. In nearly all cases, our approach outperforms the quantum compiler frameworks by IBM and Rigetti even on their highest optimization level and produces significantly smaller circuits, up to 2x reduction in the number of gates. In addition, the circuits generated using the proposed approach provide better (a) performance (on average, improved by 24.25%) and (b) reliability (on average, improved by 23.50%) compared to the IBM generated circuits when executed on the ibmq_5_yorktown physical quantum device.