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arXiv:2005.12874 · IEEE Computer Society Annual Symposium on VLSI

Quantum Divide and Compute: Hardware Demonstrations and Noisy Simulations

Thomas Ayral, François-Marie Le Régent, Zain H. Saleem, Yuri Alexeev, Martin Suchara

Published Jul 1, 2020• 27 citations
arXivHTMLPDF

Abstract

Noisy, intermediate-scale quantum computers comewith intrinsic limitations in terms of the number of qubits (circuit "width") and decoherence time (circuit "depth") they can have. Here, for the first time, we demonstrate a recently introduced method that breaks a circuit into smaller subcircuits or fragments, and thus makes it possible to run circuits that are either too wide or too deep for a given quantum processor. We investigate the behavior of the method on one of IBM's 20-qubit superconducting quantum processors with various numbers of qubits and fragments. We build noise models that capture decoherence, readout error, and gate imperfections for this particular processor. We then carry out noisy simulations of the method in order to account for the observed experimental results. We find an agreement within 20% between the experimental and the simulated success probabilities, and we observe that recombining noisy fragments yields overall results that can outperform the results without fragmentation.

DOI
10.1109/isvlsi49217.2020.00034

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Noisy, intermediate-scale quantum computers comewith intrinsic limitations in terms of the number of qubits (circuit "width") and decoherence time (circuit "depth") they can have. Here, for the first time, we demonstrate a recently introduced method that breaks a circuit into smaller subcircuits or fragments, and thus makes it possible to run circuits that are either too wide or too deep for a given quantum processor. We investigate the behavior of the method on one of IBM's 20-qubit superconducting quantum processors with various numbers of qubits and fragments. We build noise models that capture decoherence, readout error, and gate imperfections for this particular processor. We then carry out noisy simulations of the method in order to account for the observed experimental results. We find an agreement within 20% between the experimental and the simulated success probabilities, and we observe that recombining noisy fragments yields overall results that can outperform the results without fragmentation.
Abstract Our recent work (Ayral et al. in Proceedings of IEEE computer society annual symposium on VLSI, ISVLSI, pp 138–140, 2020. 10.1109/ISVLSI49217.2020.00034 ) showed the first implementation of the Quantum Divide and Compute (QDC) method, which allows to break quantum circuits into smaller fragments with fewer qubits and shallower depth. This accommodates the limited number of qubits and short coherence times of quantum processors. This article investigates the impact of different noise sources—readout error, gate error and decoherence—on the success probability of the QDC procedure. We perform detailed noise modeling on the Atos Quantum Learning Machine, allowing us to understand tradeoffs and formulate recommendations about which hardware noise sources should be preferentially optimized. We also describe in detail the noise models we used to reproduce experimental runs on IBM’s Johannesburg processor. This article also includes a detailed derivation of the equations used in the QDC procedure to compute the output distribution of the original quantum circuit from the output distribution of its fragments. Finally, we analyze the computational complexity of the QDC method for the circuit under study via tensor-network considerations, and elaborate on the relation the QDC method with tensor-network simulation methods.
Abstract This practical guide presents methods for constructing noise models using the Qiskit Aer noise module within the IBM Q ecosystem. The objective is to simulate quantum circuits under realistic error conditions, enabling accurate emulation of noisy quantum processors. The guide demonstrates how to: Use the Qiskit Aer noise module to define custom noise models. Incorporate gate errors, readout errors, and decoherence effects into simulations. Apply noise channels (e.g., depolarizing, amplitude damping, phase damping). Attach noise models to quantum circuit simulations. Analyze how noise affects algorithm performance and output distributions. Building noise models is essential for studying the behavior of quantum algorithms in the NISQ (Noisy Intermediate-Scale Quantum) era. It allows researchers to evaluate algorithm robustness, optimize circuit depth, and test error mitigation strategies before execution on real IBM Quantum hardware. This approach provides a bridge between ideal theoretical circuits and physically realistic quantum devices, enhancing the reliability and applicability of quantum computing experiments.
Simulating quantum imaginary-time evolution (QITE) is a significant promise of quantum computation. However, the known algorithms are either probabilistic (repeat until success) with unpractically small success probabilities or coherent (quantum amplitude amplification) with circuit depths and ancillary-qubit numbers unrealistically large in the mid-term. Our main contribution is a new generation of deterministic, high-precision QITE algorithms that are significantly more amenable experimentally. A surprisingly simple idea is behind them: partitioning the evolution into a sequence of fragments that are run probabilistically. It causes a considerable reduction in wasted circuit depth every time a run fails. Remarkably, the resulting overall runtime is asymptotically better than in coherent approaches, and the hardware requirements are even milder than in probabilistic ones. Our findings are especially relevant for the early fault-tolerance stages of quantum hardware.
Contemporary quantum computers with tens to hundreds of physical quantum bits (qubits) are susceptible to quantum noise. As a result, running quantum circuits on these computers is error prone. In particular, deep quantum circuits with a large number of quantum gates and qubits are more likely to fail on quantum computers. In this work, we propose a design for the quantum arithmetic division operation which runs successfully on contemporary quantum computers. A quantum division circuit is needed for realization of quantum algorithms in scientific and image processing applications. While there have been a limited number of prior works on quantum division, none of them can be implemented on quantum computers due to excessive circuit complexity. We propose a different design that exploits dynamic circuits and approximate computing to deploy a quantum division circuit in quantum computers. The dynamic circuit is a new feature in recent quantum computers for midcircuit measurement in hardware. We exploit this feature to reduce the number of qubits and increase the fidelity of quantum division. We also exploit approximate computing to overcome noise in quantum hardware. We carefully tune the scope of approximation in our circuits to offer an acceptable level of accuracy. We run our division circuit on an IBM quantum computer and show that our circuit overcomes quantum noise and generates meaningful results.
Noisy intermediate-scale quantum (NISQ) devices with limited qubit count and connectivity limit the scale of quantum circuits that can be executed. Circuit cutting methods simulate larger quantum computers by decomposing large circuits into small subcircuits that can be executed on NISQ hardware. Existing circuit cutting methods only consider the qubit count of the target hardware for finding the locations of cuts on the circuits. This can result in deeper subcircuits after mapping on the hardware. Fidelity decays exponentially with circuit depth and diminishes the quality of execution. We propose a circuit-cutting framework that reduces variance in the depth of subcircuits after mapping to the hardware. Our method formulates the initial circuit cutting as a multi-objective optimization problem based on an evolutionary search method with the number of cuts and the maximum depth of individual routed subcircuits as fitness objectives. This method is implemented as an extension to the existing Qiskit Circuit Cutting Addon, which allows for integration in existing flows. Our approach achieves reductions in routed subcircuit depth of up to 9.9% across benchmark circuits compared with baseline methods.
Abstract The practical utility of Noisy Intermediate-Scale Quantum (NISQ) processors depends critically on their performance under demanding computational loads. We investigated the impact of circuit depth on the 127-qubit superconducting processor ibm_brisbane by executing stress-test circuits utilizing all available qubits. These circuits consisted of repeated layers combining random single-qubit rotations and linear chains of Controlled-Z entangling gates. We systematically increased the ideal circuit depth from 1 up to 30 layers, resulting in transpiled circuits ranging from approximately 550 to over 15,000 gates (optimization level 2). Using the qiskit-ibm-runtime Sampler primitive with 4096 shots and default error mitigation, we successfully obtained results for ideal depths up to 22 (transpiled depth ~ 11.7k gates), beyond which platform usage limits prevented execution. Our central finding is the immediate onset of noise saturation: the output distribution reached maximum sample entropy (12.0 bits) and exhibited near-zero average single-qubit Z magnetization even at the shallowest depth tested (ideal depth 1, transpiled depth ~ 550). These noise-dominated characteristics persisted despite significant increases in transpiled circuit depth. This demonstrates that for these specific full-width, complex random circuits, noise overwhelms the computation almost instantaneously on this device under default settings, highlighting the profound challenge of achieving computational fidelity for deep, wide algorithms in the NISQ era without advanced error handling.