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Congress in Computer Science, Computer Engineering, and Applied Computing (CSCE)

Concise Yet Efficient Hardware Design of a Quantum Coprocessor

Nadia Nedjah, Sérgio Raposo, Luiza de Macedo Mourelle

Published Jul 24, 2023• 0 citations
Publisher

Abstract

This work proposes a customizable hardware design of a coprocessor that is able to perform quantum computations, exploring pure parallelism as well as a pipelined execution. The architecture is based on a quantum state memory, a scratch memory, a calculation unit, a measurement unit and, a control unit. All functional units communicate with each other via dedicated and shared data buses, depending information exchange frequency. The design is simulated and proven to be effective in executing quantum operations.

DOI
10.1109/csce60160.2023.00269

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This work proposes a customizable hardware design of a coprocessor that is able to perform quantum computations, exploring pure parallelism as well as a pipelined execution. The architecture is based on a quantum state memory, a scratch memory, a calculation unit, a measurement unit and, a control unit. All functional units communicate with each other via dedicated and shared data buses, depending information exchange frequency. The design is simulated and proven to be effective in executing quantum operations.
This work proposes a concise memory organization for an efficient customizable hardware design of a coprocessor that is able to perform quantum computations, exploring pure parallelism as well as a pipelined execution. The architecture is based on a quantum state memory, an operator memory, and a scratch memory, besides the calculation unit, the measurement unit and the control unit. All functional units communicate with each other via dedicated and shared data buses, depending information exchange frequency. In this paper, we focus on memory organization.
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It is shown that true quantum computers are analog and probabilistic computers and, in fact,they play the role of coprocessors in relation to classical computers. A digital quantum coprocessor consists of digital qubits. Each digital qubit is a finite state machine, the state changes of which is described in the same way as the state changes of an analog qubit. A digital qubit is a chain of digital quantum gates. Each digital quantum gate is digital unit, the state changes of which is described in the same way as the state changes of an analog quantum gate. The main difference between digital qubit and digital quantum gate from analog ones is the presence of memory (more precisely, the possibility of its introduction into their circuit) and its use for organizing calculations. A digital qubit without feedbacks - a digital quantum gate that can be controlled using a classic computer, is a single step of a pipeline with a measurement unit (comparator), a pipeline register and a pipeline trigger at the output. The quantum Fourier transform (QFT) is part of many quantum algorithms, in particular the Shor'sfactorization algorithm. The structures of digital quantum gates, digital qubits, and a digital quantumcoprocessor capable of performing the QFT are presented. The results of the QFT of a multi-qubit digital quantum coprocessor implemented on one FPGA are presented. For this, a IP core generator of multi-qubit quantum coprocessors was created, cores work was simulated. Models were implemented in FPGAs and their time and hardware characteristics were determined. The execution time of one quantum Fourier transform does not depend on the number of qubits in the digital quantum coprocessor and is commensurate with the time of change of the electron spin. The hardware complexity linearly depends on the number of qubits. With an increase in the number of qubits, the rate of true results of QFT decreases, at 64 qubits it is 1.5%, the decrease is nonlinear
In this paper a project for further research in digital quantum computing is presented. The experimental basis of the project is a previously developed digital quantum processor, which has been implemented in FPGA and checked for execution of a quantum Fourier transform, that is the main quantum operation of the Shor's algorithm. The project is directed to development of the design technologies, implementation, and research of the properties of a digital multi-qubit coprocessor. The novelty of this project and the methodology of its implementation are investigated. The necessary hardware and tools for designing a digital multi-qubit coprocessor are described and the effects of using the coprocessor in various research fields are discussed.
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Classical quantum computer is analog probabilistic computer. The digital quantum computer that can be implemented in FPGA is described in the article. Digital quantum coprocessor is designed to implement algorithms for execution on analog quantum computers. A digital quantum coprocessor operates under the control of a classical computer and together they are digital quantum computer. The digital quantum coprocessor is a set of digital units called digital qubits that have multibit data input and one bit data output each. The digital qubit is a wave function calculator. There is pseudo random number generator (PRNG) in described digital qubit to generate the probabilistic output bit. One bit qubit output qb is formed by the probable reduction of its multibit result x to one bit (0 or 1) according to result value x and pseudo random code k (x is an angle which determines the position of normalized vector with length 1 in polar grid, it is a result of multibit input data calculation). The decision about output state is made after the functional conversion of the qubit multibit result x to result probability p - sin.x and subsequent comparison p with the pseudo random code k. Qb -1 when kp is described. This variant allows use one PRNG for all digital qubits. Qubit presentation as vector in Bloch's sphere and vector in polar grid is discussed in the work. Also two types of coprocessor data formats (Cartesian and polar) are described. Instruction set of digital quantum coprocessor based in vector presentation in polar coordinates are discussed.