Belief propagation (BP) decoding of polar codes benefits from the high parallelism in hardware implementation and consequently provides high throughput compared to successive cancellation-based decoding algorithms. As the evolved log-likelihood ratios (LLRs) in the decoding process have a wide dynamic range, the quantization error can degrade the error correction performance of the BP decoder. To reduce the quantization error in a uniform quantization scheme, we may need to use more bits for each LLR value which is not desirable due to the required memory space. In this paper, we design an efficient hardware architecture for non-uniformly quantized LLR messages in BP decoding where the arithmetic operations on logarithmically compressed messages are replaced with the mapping to precomputed results in lookup tables. By employing 5-bit non-uniform quantization, the designed BP decoder architecture reduces the required memory space by 37.5 percent compared to 8-bit uniform quantization while additionally improving the block error rate (BLER) by more than 0.1 dB in high SNR regimes. Compared to uniform quantization, the BLER improvement of the designed architecture is up to 0.4 dB when both quantization schemes use 5 bits for LLRs.
Belief propagation (BP) decoding of polar codes benefits from the high parallelism in hardware implementation and consequently provides high throughput compared to successive cancellation-based decoding algorithms. As the evolved log-likelihood ratios (LLRs) in the decoding process have a wide dynamic range, the quantization error can degrade the error correction performance of the BP decoder. To reduce the quantization error in a uniform quantization scheme, we may need to use more bits for each LLR value which is not desirable due to the required memory space. In this paper, we design an efficient hardware architecture for non-uniformly quantized LLR messages in BP decoding where the arithmetic operations on logarithmically compressed messages are replaced with the mapping to precomputed results in lookup tables. By employing 5-bit non-uniform quantization, the designed BP decoder architecture reduces the required memory space by 37.5 percent compared to 8-bit uniform quantization while additionally improving the block error rate (BLER) by more than 0.1 dB in high SNR regimes. Compared to uniform quantization, the BLER improvement of the designed architecture is up to 0.4 dB when both quantization schemes use 5 bits for LLRs.
Belief propagation (BP) decoding for polar codes has been extensively studied because of its inherent parallelism. However, its performance remains inferior to that of successive cancellation list decoding (SCL) due to the structure of the decoding graph. To improve the block error rate (BLER) performance, the BP correction (BPC) decoding, a post-processing scheme that corrects prior knowledge of the identified code bit, improves convergence by executing additional iterations on the failed BP decoder. Moreover, the BPC decoder demonstrates a better decoding performance than the BP-based bit-flipping decoder. Nevertheless, the additional decoding attempts lead to increased latency. In this article, a modified BPC decoder is proposed to reduce the number of decoding attempts by redefining the correction rules. A new metric is designed to effectively identify the corrected location. Numerical results show that the proposed modified BPC decoder achieves a slight improvement in BLER compared with the original BPC, with a dramatic reduction in average complexity. Furthermore, a higher-order version, named MBPC-Ω, is extended to further improve the performance, where the Ω is the maximum correction order. Numerical results show that the higher-order modified BPC achieves a similar BLER performance to existing multiple bit-flipping BP decoders but has around half the latency overhead. In addition, the proposed MBPC-2 decoder performs better than the cyclic redundancy check-aided SCL (CA-SCL) decoder with list size 4 and is slightly worse than the CA-SCL with list size 8 in high signal-to-noise ratio (SNR) regions but with significant decoding latency reduction.
Belief propagation (BP) has attracted increasing attention due to its high parallelism. In this letter, a correction method is proposed to improve the block error rate (BLER) performance of the BP decoder for polar codes so that it is comparable to that of the successive cancellation list (SCL) decoder. Compared with BP flipping (BPF) decoding, the proposed decoder focuses on prior knowledge of the code bits in the factor graph. Two strategies have been proposed to construct the correction set. The simulation results show that the BPC decoder exhibits a BLER similar to that of BPF decoder while reducing the average latency and complexity by half. In addition, the BLER of the BPC decoder can approach that of the cyclic redundancy check (CRC)-aided SCL (CA-SCL) decoder in regions with low and medium signal-to-noise ratios (SNRs).
The belief propagation (BP) decoding algorithm not only is an alternative to the successive cancelation (SC) decoders of polar codes, but also provides soft outputs that are necessary for joint detection and decoding. The BP decoders with the flooding schedule achieve high throughput with excessive hardware cost especially when the block length is large. The soft-cancelation (SCAN) decoders for polar codes have reduced memory complexity compared to the BP decoders based on the flooding schedule. The simplified SC aided reduced complexity soft-cancelation (S-RCSC) decoders further reduce the computational and memory complexity of the SCAN decoders at the cost of negligible error performance degradation. Both the SCAN and S-RCSC decoders have limited throughput due to their serial decoding schedules. In this paper, we first propose an improved S-RCSC (IS-RCSC) decoding algorithm and then present a high throughput decoder architecture based on our IS-RCSC algorithm. Our IS-RCSC decoding algorithm performs the message passing on a binary tree representation of a polar code. Compared to the S-RCSC decoding algorithm, our IS-RCSC decoding algorithm accelerates the computing of the returned soft messages when certain types of nodes are activated. The corresponding hardware architecture of our IS-RCSC decoder is also proposed. In terms of area efficiency, the hardware implementation results demonstrate that our IS-RCSC decoders are 19% to 43% better than decoders in the literature.
Due to the design principle of parallel processing, belief propagation (BP) decoding is attractive, and it provides good error-correction performance compared with successive cancellation (SC) decoding. However, its error-correction performance is still inferior to that of successive cancellation list (SCL) decoding. Consequently, this paper proposes a novel flip-list- (FL)-enabled belief propagation (BP) method to improve the error-correction performance of BP decoding for polar codes with low computational complexity. The proposed technique identifies the vulnerable channel log-likelihood ratio (LLR) that deteriorates the BP decoding result. The FL is utilized to efficiently identify the erroneous channel LLRs and correct them for the next BP decoding attempt. The preprocessed channel LLR through FL improves the error-correction performance with minimal flipping attempts and reduces the computational complexity. The proposed technique was compared with the state-of-the-art BP, i.e., BP bit-flip (BP-BF), generalized BP-flip (GBPF), cyclic redundancy check (CRC)-aided (CA-SCL) decoding, and ordered statistic decoding (OSD), algorithms. Simulation results showed that the FL-BP had an excellent block error rate (BLER) performance gain up to 0.7 dB compared with BP, BP-BF, and GBPF decoder. Besides, the computational complexity was reduced considerably in the high signal-to-noise ratio (SNR) regime compared with the BP-BF and GBPF decoding methods.
The belief propagation (BP) algorithm for polar codes has attracted significant attention due to its soft-output property and high parallelism. However, the BP algorithm is not comparable with the successive cancellation list (SCL) algorithm in terms of the error-correction performance. In this paper, we propose a high-stage BP flip (HSBPF) algorithm to further improve the error-correction performance of the BP algorithm by analyzing the distribution of log-likelihood ratio (LLR) values. Simulation results show that the decoding latency can be reduced by 30% with the proposed algorithm. Moreover, benefiting from the simplified message passing of the factor graph, the computational complexity of the proposed algorithm is also significantly reduced compared with the existing algorithms.
Bit flipping was first used to improve the decoding performance of successive cancellation (SC) decoder. Since SC decoding process is serial, so the first bit that goes wrong in the decoding process will cause several subsequent bits to go wrong, which will suffer from higher decoding delay than belief propagation (BP) parallel decoding. In order to meet the performance of 5G low latency and high reliability, BP decoding algorithm have received a lot of attention. However, at medium and high signal-to-noise ratios (SNR), BP decoding does not perform as well as the SC list (SCL) decoding algorithm. Hence, BP decoding algorithm borrows bit-flip strategies from SC bit flip (SCF) decoder to improve the performance. The performance of BP bit flip (BPF) decoding depends on whether the construction of the flip set is correct, so this letter proposes a flip set construction approach based on the standard deviation of the log-likelihood ratio (LLR) and the reliability weight of polarized channels, which is comparable to the existing BPF decoding, the improved algorithm can identify the error-prone bits more efficiently and improve the decoding performance.