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IEEE International Conference on Quantum Computing and Engineering (QCE)

QubiC 2.0: A Flexible Advanced Full Stack Quantum Bit Control System

Gang Huang, Yilun Xu, Neelay Fruitwala, Abhi Rajagopala, Kasra Nowrouzi, Ravi Naik, David Santiago, Irfan A. Siddiqi

Published Sep 17, 2023• 3 citations
Publisher

Abstract

Manipulating qubits and measuring quantum processors via quantum bit control systems is traditionally done using expensive, off-the-shelf commercial electronics setups. Previously, we have introduced QubiC, an open-source FPGA-based quantum bit control system developed at Lawrence Berkeley National Laboratory. After a few years of operating on the QubiC 1.0, we realized the urgent requirements on the mid-circuits measurement and feed forward to implement advanced quantum algorithms. This requirement led to engineering a novel QubiC 2.0 on top of the RFSoC technique, incorporating enriched features. The QubiC 2.0. presented in this manuscript is implemented on the Xilinx evaluation board ZCU216. We developed a portable FPGA gateware with a lean soft processor to handle the quantum commands on the fly. Further, we created a distributed architecture with multiple processors, with a one-to-one mapping between processors and qubits, creating a parallel qubit control and measurement. Like a regular CPU, these processors access pulse envelope commands with parameterized amplitude, phase, and frequency to generate pulse information on the FPGA to ensure the speed and reusability of the entire quantum circuit. The Python software layer abstracts the low-level gateware and provides the compiler, assembler, and remote procedure call for host-to-board communication. The compiled software runs on a Python runtime environment, interfacing with the low-level gateware and hardware connected to a Quantum Processing Unit, creating a full-stack quantum bit control system. We demonstrate the architecture and the broad capabilities of QubiC 2.0 with a simplified feed forward experiment on a conditional circuit.

DOI
10.1109/qce57702.2023.10227

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Manipulating qubits and measuring quantum processors via quantum bit control systems is traditionally done using expensive, off-the-shelf commercial electronics setups. Previously, we have introduced QubiC, an open-source FPGA-based quantum bit control system developed at Lawrence Berkeley National Laboratory. After a few years of operating on the QubiC 1.0, we realized the urgent requirements on the mid-circuits measurement and feed forward to implement advanced quantum algorithms. This requirement led to engineering a novel QubiC 2.0 on top of the RFSoC technique, incorporating enriched features. The QubiC 2.0. presented in this manuscript is implemented on the Xilinx evaluation board ZCU216. We developed a portable FPGA gateware with a lean soft processor to handle the quantum commands on the fly. Further, we created a distributed architecture with multiple processors, with a one-to-one mapping between processors and qubits, creating a parallel qubit control and measurement. Like a regular CPU, these processors access pulse envelope commands with parameterized amplitude, phase, and frequency to generate pulse information on the FPGA to ensure the speed and reusability of the entire quantum circuit. The Python software layer abstracts the low-level gateware and provides the compiler, assembler, and remote procedure call for host-to-board communication. The compiled software runs on a Python runtime environment, interfacing with the low-level gateware and hardware connected to a Quantum Processing Unit, creating a full-stack quantum bit control system. We demonstrate the architecture and the broad capabilities of QubiC 2.0 with a simplified feed forward experiment on a conditional circuit.
Researchers manipulate and measure quantum processing units via the classical electronics control system. We developed an open-source FPGA-based quantum bit control system called QubiC for superconducting qubits. After years of qubit calibration and testing experience on QubiC 1.0, we recognized the need for mid-circuit measurement and feed-forward capabilities to implement advanced quantum algorithms, and upgraded the system to QubiC 2.0 on an AMD ZCU216 RFSoC evaluation board with all these enriched features. The system uses portable FPGA gateware with a simplified processor to handle commands on-the-fly. For design simplicity and straightforward scaling, we adopted a multi-core distributed architecture, assigning one processor core per qubit. The pulses combine the unique pulse envelope and carrier information specified in a command. Each pulse envelope is pre-stored in the FPGA's block RAMs, ensuring speed and reusability throughout the quantum circuit, while pulse parameters including amplitude, phase, and frequency can be updated from pulse to pulse. The software stack is developed in Python, running on both the FPGA's ARM core and a host computer via XML-RPC. Quantum circuits can be described in a high-level language supporting both pulse-level and native-gate-level programming with high-level control flow constructs, and are compiled into binary commands loaded into the FPGA. With QubiC 2.0, we achieved multi-FPGA synchronization and low-latency data communication, and demonstrated feed-forward experiments on conditional circuits. The system also serves as a platform for artificial intelligence and machine learning driven quantum control, such as FPGA-based real-time quantum state discrimination. The enhanced QubiC system provides researchers with powerful tools to explore and implement advanced quantum algorithms and applications.
As quantum information processors grow in quantum bit (qubit) count and functionality, the control and measurement system becomes a limiting factor to large scale extensibility. To tackle this challenge and keep pace with rapidly evolving classical control requirements, full control stack access is essential to system level optimization. We design a modular FPGA (field-programmable gate array) based system called QubiC to control and measure a superconducting quantum processing unit. The system includes room temperature electronics hardware, FPGA gateware, and engineering software. A prototype hardware module is assembled from several commercial off-the-shelf evaluation boards and in-house developed circuit boards. Gateware and software are designed to implement basic qubit control and measurement protocols. System functionality and performance are demonstrated by performing qubit chip characterization, gate optimization, and randomized benchmarking sequences on a superconducting quantum processor operating at the Advanced Quantum Testbed at Lawrence Berkeley National Laboratory. The single-qubit and two-qubit process fidelities are measured to be 0.99800.0001 and 0.9480.004 by randomized benchmarking. With fast circuit sequence loading capability, the QubiC performs randomized compiling experiments efficiently and improves the feasibility of executing more complex algorithms.
Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We have developed a custom FPGA-based processor architecture for QubiC, an open source platform for superconducting qubit control. Our architecture is distributed in nature, and consists of a bank of lightweight cores, each configured to control a small (1-3) number of signal generator channels. Each core is capable of executing parameterized control and readout pulses, as well as performing arbitrary control flow based on mid-circuit measurement results. We have also developed a modular compiler stack and domain-specific intermediate representation for programming the processor. Our representation allows users to specify circuits using both gate and pulse-level abstractions, and includes high-level control flow constructs (e.g. if-else blocks and loops). The compiler stack is designed to integrate with quantum software tools and programming languages, such as TrueQ, pyGSTi, and OpenQASM3. In this work, we will detail the design of both the processor and compiler stack, and demonstrate its capabilities with a quantum state teleportation experiment using transmon qubits at the LBNL Advanced Quantum Testbed.
Quantum computers rely on classical computers for control and readout. In the NISQ era, quantum computers are increasing in scale and spanning a broader range of QPU architectures and experiment/algorithm design, requiring cost-effective and flexible control systems. QubiC, the open-source control system developed at Lawrence Berkeley National Laboratory, was designed to support quantum computers in this evolution. After a few developmental years, QubiC 1.0 demonstrated its control and measurement capabilities on a superconducting quantum processing unit (QPU). With growing requirements from the QPU, QubiC 2.0 was developed on the latest RFSoC platform with mid-circuit measurement and feed-forward features, along with a new AC analog front-end. The latest updates focus on performance — with hardware-efficient randomized compiling (RC) and hardware-assisted parameterized circuit execution —, scalability — with software capable of synchronizing multiple boards —, and supporting a broader range of superconducting QPUs with an AC and DC-coupled analog front-end.
Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We present the development of an open-source FPGA (field-programmable gate array) based processor for pulse-level qubit control. Our processor is designed primarily as an upgrade to QubiC, an open source qubit control platform, but can also be adapted to other systems. The processor is distributed in nature, with one core per arbitrary waveform generator (AWG); simplifying the design and allowing for straightforward scaling. Each processor core implements an instruction set consisting of timed pulse commands as well as simple arithmetic and branching instructions. Our design also includes interfaces for synchronizing the different cores and requesting/receiving (optionally processed) measurement results. Together, these features will allow a user to program arbitrary control flow within a quantum circuit based on previous measurement results. In this poster, we detail our design along with the expected resource utilization on the Xilinx Virtex 7 FPGA, and present pulse-level simulations of our system in the context of a simple feedback experiment.
As the size and complexity of a quantum computer increases, quantum bit (qubit) characterization and gate optimization become complex and time-consuming tasks. Current calibration techniques require complicated and verbose measurements to tune up qubits and gates, which cannot easily expand to the large-scale quantum systems. We develop a concise and automatic calibration protocol to characterize qubits and optimize gates using QubiC, which is an open source FPGA (field-programmable gate array) based control and measurement system for superconducting quantum information processors. We propose mutli-dimensional loss-based optimization of single-qubit gates and full XY-plane measurement method for the two-qubit CNOT gate calibration. We demonstrate the QubiC automatic calibration protocols are capable of delivering high-fidelity gates on the state-of-the-art transmon-type processor operating at the Advanced Quantum Testbed at Lawrence Berkeley National Laboratory. The single-qubit and two-qubit Clifford gate infidelities measured by randomized benchmarking are of 4.9(1.1)×10−44.9(1.1) \times 10^{-4}4.9(1.1)×10−4 and 1.4(3)×10−21.4(3) \times 10^{-2}1.4(3)×10−2, respectively.