Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We present the development of an open-source FPGA (field-programmable gate array) based processor for pulse-level qubit control. Our processor is designed primarily as an upgrade to QubiC, an open source qubit control platform, but can also be adapted to other systems. The processor is distributed in nature, with one core per arbitrary waveform generator (AWG); simplifying the design and allowing for straightforward scaling. Each processor core implements an instruction set consisting of timed pulse commands as well as simple arithmetic and branching instructions. Our design also includes interfaces for synchronizing the different cores and requesting/receiving (optionally processed) measurement results. Together, these features will allow a user to program arbitrary control flow within a quantum circuit based on previous measurement results. In this poster, we detail our design along with the expected resource utilization on the Xilinx Virtex 7 FPGA, and present pulse-level simulations of our system in the context of a simple feedback experiment.
Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We present the development of an open-source FPGA (field-programmable gate array) based processor for pulse-level qubit control. Our processor is designed primarily as an upgrade to QubiC, an open source qubit control platform, but can also be adapted to other systems. The processor is distributed in nature, with one core per arbitrary waveform generator (AWG); simplifying the design and allowing for straightforward scaling. Each processor core implements an instruction set consisting of timed pulse commands as well as simple arithmetic and branching instructions. Our design also includes interfaces for synchronizing the different cores and requesting/receiving (optionally processed) measurement results. Together, these features will allow a user to program arbitrary control flow within a quantum circuit based on previous measurement results. In this poster, we detail our design along with the expected resource utilization on the Xilinx Virtex 7 FPGA, and present pulse-level simulations of our system in the context of a simple feedback experiment.
Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can reduce the resource requirements of certain quantum algorithms. Realizing these capabilities requires flexible, low-latency classical control. We have developed a custom FPGA-based processor architecture for QubiC, an open source platform for superconducting qubit control. Our architecture is distributed in nature, and consists of a bank of lightweight cores, each configured to control a small (1-3) number of signal generator channels. Each core is capable of executing parameterized control and readout pulses, as well as performing arbitrary control flow based on mid-circuit measurement results. We have also developed a modular compiler stack and domain-specific intermediate representation for programming the processor. Our representation allows users to specify circuits using both gate and pulse-level abstractions, and includes high-level control flow constructs (e.g. if-else blocks and loops). The compiler stack is designed to integrate with quantum software tools and programming languages, such as TrueQ, pyGSTi, and OpenQASM3. In this work, we will detail the design of both the processor and compiler stack, and demonstrate its capabilities with a quantum state teleportation experiment using transmon qubits at the LBNL Advanced Quantum Testbed.
Researchers manipulate and measure quantum processing units via the classical electronics control system. We developed an open-source FPGA-based quantum bit control system called QubiC for superconducting qubits. After years of qubit calibration and testing experience on QubiC 1.0, we recognized the need for mid-circuit measurement and feed-forward capabilities to implement advanced quantum algorithms, and upgraded the system to QubiC 2.0 on an AMD ZCU216 RFSoC evaluation board with all these enriched features. The system uses portable FPGA gateware with a simplified processor to handle commands on-the-fly. For design simplicity and straightforward scaling, we adopted a multi-core distributed architecture, assigning one processor core per qubit. The pulses combine the unique pulse envelope and carrier information specified in a command. Each pulse envelope is pre-stored in the FPGA's block RAMs, ensuring speed and reusability throughout the quantum circuit, while pulse parameters including amplitude, phase, and frequency can be updated from pulse to pulse. The software stack is developed in Python, running on both the FPGA's ARM core and a host computer via XML-RPC. Quantum circuits can be described in a high-level language supporting both pulse-level and native-gate-level programming with high-level control flow constructs, and are compiled into binary commands loaded into the FPGA. With QubiC 2.0, we achieved multi-FPGA synchronization and low-latency data communication, and demonstrated feed-forward experiments on conditional circuits. The system also serves as a platform for artificial intelligence and machine learning driven quantum control, such as FPGA-based real-time quantum state discrimination. The enhanced QubiC system provides researchers with powerful tools to explore and implement advanced quantum algorithms and applications.
Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit technology, synchronization in a large-scale system, low-latency execution, and low noise are required for electronic systems. Here, we present a field-programmable gate array (FPGA)-based electronic system with a distributed synchronous clock and trigger architecture. The system supports synchronous control of qubits with jitters of ∼5 ps. We implement a real-time digital signal processing system in the FPGA, enabling precise timing control, arbitrary waveform generation, in-phase and quadrature demodulation for qubit state discrimination, and the generation of real-time qubit-state-dependent trigger signals for feedback/feedforward control. The hardware and firmware low-latency design reduces the feedback/feedforward latency of the electronic system to 125 ns, significantly less than the decoherence times of the qubit. Finally, we demonstrate the functionalities and low-noise performance of this system using a fluxonium quantum processor.
Manipulating qubits and measuring quantum processors via quantum bit control systems is traditionally done using expensive, off-the-shelf commercial electronics setups. Previously, we have introduced QubiC, an open-source FPGA-based quantum bit control system developed at Lawrence Berkeley National Laboratory. After a few years of operating on the QubiC 1.0, we realized the urgent requirements on the mid-circuits measurement and feed forward to implement advanced quantum algorithms. This requirement led to engineering a novel QubiC 2.0 on top of the RFSoC technique, incorporating enriched features. The QubiC 2.0. presented in this manuscript is implemented on the Xilinx evaluation board ZCU216. We developed a portable FPGA gateware with a lean soft processor to handle the quantum commands on the fly. Further, we created a distributed architecture with multiple processors, with a one-to-one mapping between processors and qubits, creating a parallel qubit control and measurement. Like a regular CPU, these processors access pulse envelope commands with parameterized amplitude, phase, and frequency to generate pulse information on the FPGA to ensure the speed and reusability of the entire quantum circuit. The Python software layer abstracts the low-level gateware and provides the compiler, assembler, and remote procedure call for host-to-board communication. The compiled software runs on a Python runtime environment, interfacing with the low-level gateware and hardware connected to a Quantum Processing Unit, creating a full-stack quantum bit control system. We demonstrate the architecture and the broad capabilities of QubiC 2.0 with a simplified feed forward experiment on a conditional circuit.
As quantum information processors grow in quantum bit (qubit) count and functionality, the control and measurement system becomes a limiting factor to large scale extensibility. To tackle this challenge and keep pace with rapidly evolving classical control requirements, full control stack access is essential to system level optimization. We design a modular FPGA (field-programmable gate array) based system called QubiC to control and measure a superconducting quantum processing unit. The system includes room temperature electronics hardware, FPGA gateware, and engineering software. A prototype hardware module is assembled from several commercial off-the-shelf evaluation boards and in-house developed circuit boards. Gateware and software are designed to implement basic qubit control and measurement protocols. System functionality and performance are demonstrated by performing qubit chip characterization, gate optimization, and randomized benchmarking sequences on a superconducting quantum processor operating at the Advanced Quantum Testbed at Lawrence Berkeley National Laboratory. The single-qubit and two-qubit process fidelities are measured to be 0.99800.0001 and 0.9480.004 by randomized benchmarking. With fast circuit sequence loading capability, the QubiC performs randomized compiling experiments efficiently and improves the feasibility of executing more complex algorithms.
This paper reports the development of a low-latency arbitrary waveform generator (AWG), which is suitable for the control and measurement of superconducting quantum computers. It can generate qubit control signals and measurement signals in real time. Compared with commercial AWG, our AWG has less latency and higher analog bandwidth. Compressing latency can reduce system feedback time, and higher analog bandwidth improves the system's integration by mounting more qubits on the readout line. The AWG integrates four high-speed digital-to-analog converters (DACs), phase-locked loop (PLL) circuits, field-programmable gate arrays (FPGAs), and related circuits into a standard PXI 3U board. The waveform generator module, communication interface module, clock module, and configuration module are realized utilizing the FPGA. The FPGA-based hardware architecture enables AWG to be flexibly configured to meet the various needs of quantum experiments. The four-channel AWG has a 2-GSa/s sampling rate, a 14-bit resolution, and 500 MHz bandwidth. The jitter in the AWG output waveform is approximately 3 ps; the latency of the AWG (the time from the feedback trigger received until a feedback pulse is generated) is approximately 55 ns. These designs form the basis of realizing control system for large-scale quantum computing.