Abstract Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes to ensure fault-tolerance in quantum circuits. However, it is important to note that T-gates come at a considerable computational cost. Our methodology revolves around a comprehensive study of these comparator circuits from a bottom-up perspective. We delve deep into the intricate details of these circuits, dissecting their underlying components and functions. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We have expressed the proposed circuits in Clifford+T gates to render them fault-tolerant while concurrently minimising the utilisation of T-gates, thereby mitigating the associated computational costs. By strategically reducing the number of T-gates used and improving their efficiency, we not only mitigate computational overhead, but also ensure the robustness of these circuits in the face of errors and environmental disturbances.
Abstract Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes to ensure fault-tolerance in quantum circuits. However, it is important to note that T-gates come at a considerable computational cost. Our methodology revolves around a comprehensive study of these comparator circuits from a bottom-up perspective. We delve deep into the intricate details of these circuits, dissecting their underlying components and functions. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We have expressed the proposed circuits in Clifford+T gates to render them fault-tolerant while concurrently minimising the utilisation of T-gates, thereby mitigating the associated computational costs. By strategically reducing the number of T-gates used and improving their efficiency, we not only mitigate computational overhead, but also ensure the robustness of these circuits in the face of errors and environmental disturbances.
Abstract Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes. However, it is important to note that T-gates come at a considerable computational cost. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We articulate the proposed circuits employing Clifford+T gates, facilitating error correction code implementation. Additionally, we minimise T-gate usage, thereby reducing computational costs and fortifying circuit robustness against errors and environmental disturbances-essential for mitigating the effects of internal and external noise. Our methodology employs a bottom-up examination of comparator circuits, initiating with a detailed study of their gates. Subsequently, we systematically dissect the functions of these gates, thereby advancing towards a comprehensive understanding of the circuit’s overall functionality. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance.
Abstract The intrinsic high parallelism and entanglement characteristics of quantum computing have made quantum image processing techniques a focus of great interest. One of the most widely used techniques in image processing is segmentation, which in one of their most basic forms can be carried out using thresholding algorithms. In this paper, a fault-tolerant quantum dual-threshold algorithm has been proposed. This algorithm is based on Clifford+T gates. Because T gates add fault tolerance but have the trade-off of having a much higher cost than other quantum gates,our focus has been on reducing the number of T gates. This has allowed adding noise tolerance, computational cost reduction and fault toleranceto the state-of-the-art dual-threshold segmentation circuits. Sincethe dual-threshold image segmentation involves the comparison operation,as part of this work we have implemented two comparator circuits.These circuits optimise the metrics T-count and T-depth with respect to the best circuit comparators currently available in the literature.
Abstract Current quantum computers have a limited number of resources and are heavily affected by internal and external noise. Therefore, small, noise-tolerant circuits are of great interest. With regard to circuit size, it is especially important to reduce the number of required qubits. Concerning to fault-tolerance, circuits entirely built with Clifford+T gates allow the use of error correction codes. However, the T-gate has an excessive cost, so circuits with a high number of T-gates should be avoided. This work focuses on optimising in such terms an operation that is widely used in larger circuits and algorithms: the calculation of the absolute-value of two’s complement encoded integers. The proposed circuit halves the number of required T gates with respect to the best circuit currently available in the literature. Moreover, our circuit requires at least 2 qubits less than the other circuits for such an operation.
Reversible logic is essential in quantum computing due to its ability to preserve information and establish a one-to-one mapping between inputs and outputs. The Clifford+T gate set, known for supporting fault-tolerant quantum circuits, offers resilience against decoherence but introduces high implementation costs, particularly due to the T gate's resource intensity. In this work, we propose a new and efficient quantum multiplexer design, the Quantum Clifford T-MUX, designed entirely within the Clifford+T framework. This multiplexer minimizes T-count and avoids the use of ancillary qubits, both critical factors for practical, fault-tolerant quantum computing. As part of this architecture, we present a newly designed fault-tolerant Peres gate using only Clifford+T gates, which serves as a fundamental building block in the T-MUX construction. The proposed T-MUX achieves reduced T-count, no garbage output, and improved efficiency compared to traditional designs. These improvements position it as a valuable component for building scalable quantum Arithmetic Logic Units (ALUs), data buses, and memory systems. Overall, this work contributes toward the development of low-overhead, modular quantum control structures suited for near-term and long-term quantum computing architectures. The proposed circuit is simulated using the Quirk online tool, and the result confirms the accuracy of the design. This design achieves an average 35% improvement in T-Count without any constant input, compared to its counterpart, respectively.
The quest of achieving higher computing performance is driving the research on quantum computing, which is reporting new milestones almost on a daily basis. For practical quantum circuit design, fault tolerance is an essential condition. This is achieved by mapping the target functions into the Clifford+T group of elementary quantum gates. Furthermore, the application of error-correcting codes in quantum circuits requires the quantum gates to be formed between adjacent Qubits. In this work, we improve the state-of-the-art quantum circuit design by addressing both of the above challenges. First, we propose a novel mapping of Multiple-Control Toffoli (MCT) gates to Clifford+T group gates, which achieves lower gate count compared to earlier work. Secondly, we show a generic way to convert any Clifford+T circuit into a nearest neighbor one. We validate the efficacy of our approach with detailed experimental studies.
Arithmetic operations are an important component of many quantum algorithms. Optimizing quantum circuits for these operations therefore leads to more efficient implementations of the corresponding algorithms. In this paper, we develop new fault-tolerant quantum circuits for various integer division algorithms (both reversible and non-reversible). These circuits, when implemented in the Clifford+T gate set, achieve improvements in the asymptotic T-count and CNOT-count from O(n2) to O(nm), and in the asymptotic T-depth from O(n2) to O(nlogm), where n and m are the bit lengths of the dividend and divisor, respectively. The qubit counts are significantly lower than those in previous works. We achieve this through careful modifications of the division algorithms and by expressing them in terms of a primitive we call COMP-N-SUB that compares two integers and conditionally subtracts them. We show that this primitive can be implemented at a cost, in terms of both Clifford and non-Clifford gates, comparable to that of one addition. By contrast, performing comparison and conditional subtraction separately would cost roughly as much as a controlled addition plus a regular addition.