There is a lot of focus on how Quantum Computing as an accelerator differs from other traditional HPC resources, including accelerators like GPUs and FPGAs. In classical computing, how to design the interfaces that connect the different layers of the software stack, from the applications and its high-level programming language description through compilers, schedulers, down to the hardware, and gate-level, has been critical. Likewise, quantum computing’s interfaces enable the access to quantum technology as a viable accelerator. From the ideation of the quantum application to the manipulation of the quantum chip, each interface has its challenges. In this column feature, we discuss the structure of this set of quantum interfaces, their many similarities to the traditional HPC compilation stack, and how these interfaces impact the potential of quantum computers as HPC accelerators.
There is a lot of focus on how Quantum Computing as an accelerator differs from other traditional HPC resources, including accelerators like GPUs and FPGAs. In classical computing, how to design the interfaces that connect the different layers of the software stack, from the applications and its high-level programming language description through compilers, schedulers, down to the hardware, and gate-level, has been critical. Likewise, quantum computing’s interfaces enable the access to quantum technology as a viable accelerator. From the ideation of the quantum application to the manipulation of the quantum chip, each interface has its challenges. In this column feature, we discuss the structure of this set of quantum interfaces, their many similarities to the traditional HPC compilation stack, and how these interfaces impact the potential of quantum computers as HPC accelerators.
There is a great deal of focus on how quantum computing as an accelerator differs from other traditional high-performance computing (HPC) resources, including accelerators like GPUs and field-programmable gate arrays. In classical computing, how to design the interfaces that connect the different layers of the software stack, from the applications and high-level programming language description, through compilers and schedulers, and down to the hardware and gate level, has been critical. Likewise, quantum computing’s interfaces enable access to quantum technology as a viable accelerator. From the ideation of the quantum application to the manipulation of the quantum chip, each interface has its challenges. In this article, we discuss the structure of this set of quantum interfaces, their many similarities to the traditional HPC compilation stack, and how these interfaces impact the potential of quantum computers as HPC accelerators.
Quantum computing is advancing rapidly, with notable progress in both hardware and algorithm development. However, to make quantum computing truly accessible and usable across disciplines, a comprehensive, efficient and unified software stack is essential. Such a software stack must be flexible enough to support diverse hardware platforms and evolving algorithms, while enabling programming models for a wide range of users from quantum specialists to users without deep quantum expertise. Additionally, a software stack must support dynamic resource management for efficient system utilization as well as seamless integration with classical High-Performance Computing (HPC) environments. The latter is key, as quantum systems are increasingly envisioned as accelerators within hybrid workflows, supporting various levels of integration from loosely to tightly coupled. Despite numerous discussions, conceptual proposals, and initial efforts in recent years, few tangible implementations of such full-featured software stacks currently exist.
High-performance computing (HPC) has evolved over decades through multiple architectural transitions, from vector supercomputers to massively parallel CPU clusters and GPU-accelerated systems, continuously expanding the frontier of scientific discovery. With the emergence of quantum processing units (QPUs) as practical computational accelerators, a new opportunity arises to further extend this trajectory by integrating quantum and classical computing paradigms. Building on the emerging vision of Quantum Integrated High-Performance Computing (QHPC), this paper contributes a full-stack layered architecture that integrates QPUs as first-class accelerators within, not merely alongside, the classical HPC software and hardware stack, with tight, on-premise quantum–classical coupling as its defining characteristic. The architecture comprises of unified resource management, quantum-aware scheduling, hybrid workflow orchestration, middleware and programming abstraction, interconnect technologies, and a tiered execution model enabling seamless workload partitioning across classical and quantum backends. A central aspect of this architecture is a strong user requests abstraction layer that exposes heterogeneous resources through a unified job submission interface, similar in spirit to existing schedulers such as Slurm, allowing users to describe workloads in a consistent template independent of underlying compute type or location. Drawing insights from prior accelerator integration eras, we outline how QHPC can support emerging workloads in quantum chemistry, materials discovery, combinatorial optimization, and climate modeling. We conclude by highlighting open challenges in building scalable, reliable, and programmable quantum–classical infrastructures that seamlessly connect global users to heterogeneous compute resources for future quantum–classical HPC ecosystems.
High-performance computing (HPC) has evolved over decades through multiple architectural transitions, from vector supercomputers to massively parallel CPU clusters and GPU-accelerated systems, continuously expanding the frontier of scientific discovery. With the emergence of quantum processing units (QPUs) as practical computational accelerators, a new opportunity arises to further extend this trajectory by integrating quantum and classical computing paradigms. Building on the emerging vision of Quantum Integrated High-Performance Computing (QHPC), this paper contributes a full-stack layered architecture that integrates QPUs as first-class accelerators within, not merely alongside, the classical HPC software and hardware stack, with tight, on-premise quantum-classical coupling as its defining characteristic. The architecture comprises of unified resource management, quantum-aware scheduling, hybrid workflow orchestration, middleware and programming abstraction, interconnect technologies, and a tiered execution model enabling seamless workload partitioning across classical and quantum backends. A central aspect of this architecture is a strong user requests abstraction layer that exposes heterogeneous resources through a unified job submission interface, similar in spirit to existing schedulers such as Slurm, allowing users to describe workloads in a consistent template independent of underlying compute type or location. Drawing insights from prior accelerator integration eras, we outline how QHPC can support emerging workloads in quantum chemistry, materials discovery, combinatorial optimization, and climate modeling. We conclude by highlighting open challenges in building scalable, reliable, and programmable quantum-classical infrastructures that seamlessly connect global users to heterogeneous compute resources for future quantum-classical HPC ecosystems.
The technology of Quantum Computing (QC) is continuously evolving, as researchers explore new technologies and the public gains access to quantum computers with an increasing number of qubits. In addition, the research community and industry are increasingly interested in the potential use, application, and contribution of QCs to large-scale problems in the real world as a result of this technological enhancement. QCs operations are based on quantum mechanics, and their special properties are mainly exploited to solve computationally intensive problems in polynomial time, problems that are commonly unsolvable, even by High-Performance Computing systems (HPCs) in a feasible time. However, since QCs cannot perform as general-purpose computing machines, alternative computational approaches aiming to boost further their enormous computing abilities are requested, and their combination as an additional computing resource to HPC systems is considered as one of the most promising ones. In the proposed hybrid HPCs, the Quantum Processing Units (QPUs), similar to GPUs and CPUs, target specific problems that, through Quantum Algorithms, can exploit quantum properties like quantum entanglement and superposition to achieve substantial performance gains from the HPC point of view. This interconnection between classical HPC systems and QCs towards the creation of Hybrid Quantum-Classical computing systems is neither straightforward nor standardized while crucial for unlocking the real potential of QCs and achieving real performance improvements. The interconnection between the classical and quantum systems can be performed in the hardware, software (system), or application layer. In this study, a concise overview of the existing architectures for the interconnection interface between HPCs and QCs is provided, focusing mainly on hardware approaches that enable effective hybrid quantum-classical operation.
With quantum computing (QC) maturing, high-performance computing (HPC) centers are already preparing to host early-phase production versions of such systems. Unlike their experimental predecessors in physics laboratories, with a very small and dedicated user community, this next generation of systems needs to serve a wider user community and must work in concert with existing HPC systems and software stacks. This article describes our vision for an integrated ecosystem that combines existing HPC and evolving quantum software stacks into a single system to enable a common and continuous user experience. This integration comes with several major challenges as quantum systems pose significantly different requirements including increased need for compilation at run time, long optimization times, statistical evaluations of results, and the need to work with few centralized resources. To overcome these challenges, new scheduling approaches on the HPC side and new programming approaches on the QC side are required.